Welcome to ASML's 2018 Investor Day. I am Skip Miller, Vice President of Investor Relations here at ASML, and I want to thank you all first for making the trip to our headquarters here in Veldhoven. It's nice to see such a full house. Good morning, good afternoon, or good evening to all those joining us via webcast. Before we go through the agenda, I'd like to talk to a few housekeeping items. First off, if you could all make sure you have your phone on silent, vibrate, or airplane mode, it would be appreciated. In front of you, there's a little holder there that has notebooks, if you want a notebook to write in, if you haven't found those. The restrooms are outside and to the left. I think many of you probably saw those on the way in.
Finally, the presentations that we will have today will be posted on our website at the end of the day, around 5:00 P.M. tonight. Let me first provide an overview of the day. We've sent some of this out earlier, but we will spend roughly four hours here going through presentations. We will have a break around 3:00 P.M. for a half hour. We will then go into a Q&A session at the end of the presentation, around 4:15 P.M., allowing 45 minutes for Q&A. We will next go, after the event, around 5:00 P.M., we'll go in to do a fab tour. It's actually a tour of the Experience Center, but we'll have a few that will actually, in a lucky draw, go to the DUV and EUV fab.
The management team will, after the Q&A session, rejoin us in the plaza around 6:00 P.M., there will be time for additional interaction and Q&A if we don't get to your question in the Q&A session at the end of this area. Finally, we will have dinner around 6:30 P.M. Drinks will start right after the event here at 5:00 P.M. We will likely be done the tour before 6:00 P.M., that'll give a little more time for mingling. At 6:30 P.M., we'll start with the dinner. We have a guest speaker from imec, Jo De Boeck, who is the current Chief Strategy Officer of imec. He'll talk about some of the work we're doing with imec and the great opportunity out there. We should then plan to wrap up around 8:30 P.M., and the bus for those going back to the hotel departs at 9:00 P.M.
Let me first go through the presentations. First off, our CEO, Peter Wennink, will give a company strategy, market trends, and stakeholder value presentation. Next, our CTO, Martin van den Brink, will give an update on the industry technology roadmap as well as our strategy. Then we have Christophe Fouquet, going to talk about EUV products and the business opportunity there. Jim Koonmen will then talk about our application products and business opportunity. For some of those who joined in 2014 and 2016, we are calling that section of the presentation Holistic Litho Products, but it's the applications business, what we discussed. Then we'll go to a break out in the foyer here, which will be roughly a half hour. We'll rejoin, have a video, and then Ron Kool will talk about deep UV products and our business opportunity there.
Finally, we'll wrap up with our financial business model and capital allocation strategy with our CFO, Roger Dassen. Peter will close at 4:15 P.M. with those remarks, we'll go into Q&A session, as I mentioned. With that, I think that was a good enough intro, I'd like to introduce our President and CEO, Peter Wennink.
Thank you, Skip. Thanks. Company strategy, market trends, and stakeholder value. First of all, I want you to read this. It's a forward-looking statement, but it's probably well-known to all of you. We are going to give you a peek into the future, we unfortunately don't have a full swing crystal ball. What we're going to show you is at least what we believe is going to happen the next couple of years and how that translate into value for you all. First slide, overview. When we look at the company and talk about the future developments, I think there's one thing I would like to highlight, that's innovation. Innovation will continue. There's no doubt about it. Innovation will also drive, together with our customers, a very healthy semiconductor business.
It will fuel a lot of applications that we're all not only dreaming of, but that we're seeing today happening. I'll talk a little bit about that later. It also will translate then to a significant growth in wafer capacity in all segments, but it will focus on leading-edge nodes, because that will provide most of the value. Which actually means, you saw it in the intro video, Moore's Law continues. There's a strong growth opportunity for lithography coming out of an era where multiple patterning was not the solution of choice for our customers, but you could see, you would almost say it was the only way to move forward a solution into single patterning again into the EUV era. Whereby deep UV still will remain a very important part of our business.
We will continue to expand our product portfolio across the three business lines, we will drive growth opportunities, we think we can provide a lot of value. Now, I think this is an important slide. It's an interesting slide, it's a slide that was produced by Lisa Su of AMD, it effectively shows the growth curve. You can see the S-curve of PCs and browsers and the smartphone. We go into this immersive era. It is driven by immersive technology. What's immersive technology? It's the effect where the lines blur between the physical world and the digital and simulation world in what we could call a mixed reality. A mixed reality is technology that is based on human senses, vision, hearing, smell, taste, feeling.
It has an impact on computing, because in the PC era, we had the central processing unit, the CPU, but now we have processing units, neural processing. Neural processing really is sensor-driven tasks are coming to the center, which basically drives robotics, but also IoT applications. Massive amounts of data are being processed through advanced algorithms. It's not only neural processing units, it's graphics processing units, but also basically helping us in this space, processing vast amounts of data in big data blocks with sometimes hundreds of cores, using also these advanced algorithms. DSP, digital signal processing, becomes part of it. It's basically integrated computing complexity. That's what we're seeing. We're not dreaming this up. I mean, it's what our customers tell us. When we go to our customers and we talk about the roadmaps and about the application space, this is what we hear.
Yeah. It's this integrated complexity in the computing space that is driving our business now and over the next decade. Of course, we see this a good example in automotive, where you see this whole sensor data-driven application space, in the automotive, where we see different types of sensors ranging from LIDAR, radar, optical, and all needs to be combined in this integrated complexity. It's also true for artificial intelligence, whether it's robotics, we're seeing that machine to machine. We see it in autonomous driving, product intelligence in smart homes, in home appliances, virtual agents, call centers, decision making, in credit risk, and you're probably very familiar with that. Process optimization, it all driven by artificial intelligence, and that is driven by the compute power behind it. Nothing works if we don't have the speed and the improvement in latency to do things real time.
That means 5G will come. If you look at areas in the world where there's a lot of push, for instance, China, is all about 5G because these are the areas of technology that will enable what we are trying to achieve. That creates volume. This is important because it also fuels the demand for storage. If you look at storage, by 2020, we believe we'll see 44 ZB of data storage capability, which is a factor of 10 up in the last six to seven years.
When you look at all these developments, it's basically all circles around Moore's Law because when you look at the application space, we talked about this artificial intelligence, autonomous decision-making, the data highway and the storage capabilities, the fast algorithms, it all circles around the notion that we can only execute this if performance and cost of what we're doing is in sync. It's the cost per function. That is Moore's Law. As I say, Moore's Law, historically, we would have said the definition is every two years, the capability of the device doubles at the same cost. The cost per function halves. It either means that the same functionality you halve the cost, or at the same cost, you double or triple the functionality. This is really what it's all about. We are at the heart of it.
As you will show, as we will show in the presentations to come, we have the conviction that together with our customers, we can keep this going. If we think about this and we think about the areas where this applies and how we like to translate that into growth, let's look at a number of end markets. We have the maturing markets, which is the mobile and the PC, single-digit growth areas. You have the second part is continued growth in the cloud applications. It could be in the infrastructure, which is the telecommunication, the equipment, single-digit growth. When you look at service and data storage, that's an area that from 2016 to 2025, almost triples to EUR 120 billion, 12% CAGR. It's also true for the connected device market, the emerging markets and automotive and industrial electronics are just two examples.
Where also we see double-digit growth. When you translate this and you see this, how does that translate into wafer capacity? What have we done? We basically said, "Let's take some industry analysis on those product groups, those areas of industry that grow fast." We had a few examples on the previous slide, like automotive and the industrial application service. We take the industry analyst till we had the data till 2022. We plot all of those segments or the S maturity curve, and we say, "How does that extrapolate all those individual segments to 2025?" When we then look at that and take the customer roadmaps, and look at the capabilities of our customers to execute this, we can calculate wafers.
When we calculate wafers, we look at logic and NPU, we see that in a 10-year period, from 2015 onwards, we believe that the wafer capacity, the million wafer starts per month, will triple in 10 years' time, from 2015 to 2025, from 0.5 to about 1.6 million. If you then take DRAM, it goes from 1.2 to 1.7. DRAM, of course, you get more bits, not only by making more wafers, but also by increasing the density, which is of course the innovation that you also see happening in DRAM and in 3D NAND. 3D NAND, when we do the extrapolation, we believe that from 2015 to 2025, over a 10-year period, you can see growth of 1.5 to 2.5 million wafers. Adding it all up, 2025, about 6 million wafers by 2025. Where are we today?
I think we're just above 3 million, it's doubling over the next seven years in installed wafer capacity. If you then plot this on a growth map and say, "How does this grow from 2010 to 2025?" You can plot 2015 somewhere around the 3 million mark, 2025 around the 6 million, you will see that these new semiconductor nodes will drive the investments in wafer capacity. Very important for us is that by that time, the new nodes, the nodes that we're currently not delivering to our customers, that we will deliver over the next seven years, will intensify and will be about, you could say, 2/3 of the installed wafer volume by 2025. It's about innovation. I said it before, this is about innovation, and this is where it will show. Litho intensity will go up.
Now, if we then look at litho intensity, and we take those three segments, logic, performance memory, and storage, and we look 10 nm where litho intensity is about 25%. We have pretty good view on 7 nm these days. It will go up to 29%, and our projection is that when we move from 5 nm to 3 nm, it will go to 35% and to over 40% at 3 nm. Litho intensity is the litho CapEx fraction of total WFE. So litho intensity will go up. Also true for performance memory, DRAM, whereby 1X, 24%, 1I at 25%, but at 1A, which will be beyond, let's say, the mid-teens, it will go to 27%. In 3D NAND, it will decrease because of the fact that 3D NAND will start adding layers.
Now, clearly, there is stacks of stacks included here, so when you're at 64 layers, we're at 19%, 96 layers at 15%, 128 at 13%, because we are stacking layers, and you need limited amounts of additional litho there. However, as you listen well to some of our memory customers, whether it's Micron or H ynix and even Samsung, they talk about the next-generation memory, the new memory types. If you look at storage class memory, where we again, not only shrink in Z direction by adding the layers, but also in Y and X, and in Z direction, then you will see a litho intensity that's significantly higher, but also with a significantly increased density. So this is something for the first half of the next decade, where we see the introduction of storage class memory.
Now, what does that mean in terms of growth scenarios of percentage of total semi CapEx and affordability? So let me walk through this slide. When we look at from 1997 to 2025, we divided that into three blocks, 1997 to 2010, 2010 to 2017, 2017 to 2025. Three. The semi customers grew in the first column until 2010, about 6% per year. That dropped in 2010 to 2017, around 5%, and we think it will stay around that 5% area. Semi CapEx actually in the middle column from 2010 to 2017, went up quite significantly from just under 5% to over 7%. We call that the multi-patterning era. In that time frame, multi-patterning was introduced, and some people said because EUV was late, and I think that's true. We saw multi-patterning coming in logic quite significantly.
We now see it in DRAM, but also we have seen stacking going up in the 3D NAND space, where there was this period where we had almost a double whammy by adding new 3D NAND wafer capacity on top of the conversions of 2D to 3D. We were in this period, a seven-year period, where we had a significant increase in semi CapEx, and litho stayed behind, for the simple reason that stacking includes a lot of other process steps where you don't necessarily need litho. The thing with multi-patterning is it's expensive. With the introduction of EUV, we see going forward from 2017 to 2025, a significant space for EUV. If you remember the previous slide, you saw that the litho intensity in logic and DRAM is going up.
While the semi end markets grow at about 5%, we believe that semi CapEx as a percentage of sales will go down to just under 4%, but litho will be just above 7%. In fact, we'll go back from the single patterning era through the multi-patterning area to EUV, where it will be single patterning again. The question is this affordable? When you look at the litho CapEx as a percentage of semi revenue, it actually stays around 2.3%. It had dropped a little, in the intermediate period. It goes back to about 2.3%. Also the relative cost per function, which of course is Moore's Law, keeps going down over that period until 2025, which is basically, if you look at over a 20-year period, it's about a factor of 100 down in terms of cost.
Litho intensity will go up, providing us a growth opportunity, which is significantly driven by EUV, and it's still affordable, which is the most important. I think it's evidence, and Christophe will talk about this, by the fact that our customers have engaged on the High-NA EUV journey, securing them an EUV solution well into the second half of the next decade, and beyond. If you now look at 2025, and we look at the division of our products, and I look at litho systems only, you can see there's quite a significant shift in what we will sell and what we will ship. You can see almost 75% of our business is currently deep UV, but over 75% will be EUV by 2025. If you take ArF immersion, leading-edge immersion, and Ron will talk about that will not stop.
There will be significant innovations in deep UV immersion, is more than 85% or closer to 90% of our sales will be leading edge by that time. Do we have challenges? Yes, we do. We have four strategic priorities. I wouldn't even call them challenges. It's the priorities. It's we have to expand our holistic litho opportunity. We have to remain competitive in deep UV because it's still a very good business. We will have to bring EUV to high-volume manufacturing with all the parameters that signify high-volume manufacturing, and EUV technology beyond the next decade, which is High-NA.
Holistic litho extension is really focused on the building a winning position in what we call pattern fidelity control, which is the combination of our metrology and inspection capabilities, combined with our superior computational litho capabilities and the litho scanner capabilities, and integrate that into one solution for our customers, whereby the litho plus leadership will be strengthened by what we call in-device metrology, and Jim will talk about that. To stay competitive in deep UV, we focus on a couple of things. We continue to lead in innovation. Deep UV is going to be a workhorse for a very long time. Innovation is on productivity. Innovation is on match machine- to- machine overlay. It's on focus. It's on many operational parameters that our customers use in their production process. It's also very much about driving the operational cost down and improve uptime.
It's about operational excellence because this will be a workhorse. It already is. It will be more a workhorse. It's about operational excellence and cost driving down, and expanding our install base business. If you do these things, we will maintain our margin profile at a very healthy basis. Especially Ron will also talk about the change in the mix between new systems and install base business. On EUV industrialization, very clear. EUV works. Now, how quickly can we make it operational excellent to the level of deep UV? Christophe will talk about that. We will focus on high-volume manufacturing, service, and financial performance. I think we have all the ingredients, and we have the knobs to turn to make that a resounding success, and Christophe will talk about that. It's not only what we have today.
It's very important that we have a roadmap that we can show to our customers that performance improvement and cost down is also visualized in the next generations of 0.33 NA EUV. They will be with us. That particular node, 0.33 NA EUV, which is the current EUV node, will be with us forever. Very important part of our business going forward. The last one is High-NA, 3 nm and beyond. We need High-NA, which will be second half of the next decade and beyond. Christophe will also talk about that. That means that, can we continue this? This is an historical graph.
It actually meant that when we look at four of our stakeholders, our shareholders, our customers, our people, and our partners and suppliers, we have created significant value, a 46% improvement of productivity, a significant increase in our share price and total shareholder return. We've employed and are still employing an increasing number of very smart and bright people, and we have fueled our supply chain with over EUR 30 billion of business over the last seven years. We'll keep doing that. This is historical, but I think these trend lines you will see going forward will have the same kind of slope. On our Sustainable Development Goals, it's very important, becomes more and more an issue with our shareholders and with our stakeholders. There are many. The United Nations SDG goals, the Sustainable Development Goals are many.
We've chosen, in fact, six, but we brought it down to five areas. We focus on people, and what we're trying to do in this highly innovative environment, we need the brightest people from all over the world. In this Veldhoven site, we employ 103 nationalities, and we get them from all over the world. It's very important for us and to keep growing them. Circular economy, use and reuse of the materials. Think about installed base business, the stuff that you're getting back. That, if we do this smart, it will have a significant impact on cost and on quality. Climate and energy, we have to reduce the carbon emissions in our operations, be more sensible with energy usage, which also has a cost element, which will benefit us. Of course, fostering the innovation system with our partners is key. We're an open innovation company.
We have this broad ecosystem that is supplying us with the latest and greatest. We want to make sure that we promote these levels of responsibility further in the supply chain. If we summarize, I think there's a very clear value creation opportunity going forward over the next seven years and beyond, driven by innovation. I think that will drive significant health in the semiconductor business because the opportunities are there. The solutions are there. The customer roadmaps extend till the end of the next decade. We have the technology to support that. It means if we can do this together with our customers, it will translate into higher wafer count. We need more capacity. That means that lithography as such is going to be a key element in that drive for more value.
It means that we will see a strong growth in the EUV market mixed with the deep UV market. We will expand our product portfolio as a result of that, and it will further drive the growth opportunities for the next 10 years. Rest assured, Roger will talk about that, how do we translate that. I think we can translate that into significant value for our shareholders. That was my summary. I'll be more than happy to transfer to Martin for his review of the technology roadmap. Thank you.
Good afternoon. I will try to connect the story of Peter, where he discussed the overall market trends to the business units and show you the synergistic approach we have here. About roadmap and technology strategy. To start with our overview, we still think that Moore's Law continues, at least by another 10 years. Moore's Law is now being broadly defined that historically it was only resolution. As I will show, we have now Moore's Law going on multiple engines, which I think helps the overall industry, also helps us moving forward. We will see that all of the customer roadmaps continue to use lithography solutions and shrink. It likely will again continue another 10 years or so. We'll get to higher volumes of wafers on the leading-edge nodes moving forward. Finally, our product portfolio is aligned with our customer roadmaps.
In fact, in that sense, lithography roadmaps keeps as simple as it ever was. We just go down resolution, we have to adjust the accuracy of the systems down and making sure we crank out as many wafers as we can. Finally, we'll have to summarize this in our strategic priorities, to go for also cost-effective shrink. Peter introduced the overall market trends, going from algorithms, applications, and data. All of this is only possible by having a engine driving it, which is performance and cost. Without an increase in performance and a decrease in cost, people could not afford the amount of data we're carrying today. You could not create the knowledge. Moore's Law is not only on logic, where you see substantial innovation. It will also reflect in advanced memory systems and as well architectures for fast innovations.
This is still developing and progressing, moving forward. You see here how I picturized that. I like to show how it would look like. You see here Moore's Law innovation in four fields. You could, of course, arbitrarily argue there should be a few more, but I try to say it's traditionally about dimensional scaling here on the left-hand side. I took this picture from Intel, which continue to make major jumps moving forward. This will continue. We'll quantify it in the next couple of slides a bit better. It's about circuit scaling, and as an example there, we may include a cross-section of your, m ost of you may carry your Apple device, and recent Apple device has the most advanced integrated memory microprocessor unit of the planet is in these advanced phones.
A number of years ago, people only talked about it, now you buy it in volume. You see here integration of memory and logic. The third one is what I call device innovation. I took here the example of Samsung, who has been very vocal on them moving forward with FinFET as we speak, but also introducing aggressively EUV and also what we call so-called gate-all-around, the summum of gate control. On the final box, you see the architectural scaling, where in the past, even in a phone, you would find only a single CPU. We moved up to a multi-core CPU. You moved to including GPUs and also have small and big CPU, small CPUs for specific task.
Recently, you get these general processors into place, to deal and tensor calculation to also include artificial intelligence, including your phone, which is part of your image recognition. Although we are putting ourselves a bit modestly only very active here, we believe that this continues to be a essential piece of the cost. As long as we're part of the total engine, we see a continuous participation of ASML in this overall Moore's Law drive. Peter already mentioned Lisa Su. She made a nice presentation last year, where she predicted that the past 10 years we saw about a density or log scale system performance. This is not the same as amount of transistor. This is system performance per watt. Had an improvement of 2X every two and a half years. She predicts it will be larger than 2X.
Yes, it will consist out of many elements. Here the process technology, which I choose to color a bit, where litho includes, is about 30% of any innovation. If you compare it, just for fun, what Moore's Law did publish in 1967, he was about the same 30% attribution to physical shrink as Lisa Su predicted today. Many people are concerned about Moore's Law continue, but we are still think there is quite some future to go. Yes, at some point in time it will stop, but it is not in our sight yet. Here I used some public data, how shrink did go for major products, DRAM and logic. DRAM is the performance main memory.
You see here that as of 2015, DRAM was about, this is the vertical axis here is the bit density per square millimeter, there the transistor density on the logic side. You see we were on a very steep curve until 2015, where we reached the limits of scaling, not so much of the transistor on a DRAM device, but on the capacitor, which forces DRAM people to go somewhat slower. Yes, we have visibility to our customer roadmap a few nodes further, but I choose to give a range that we will continue to see a structural slower shrink to DRAM as we've seen historically. However, if you look today to the DRAM business, it's all sky high. Never been so high almost than today. Lower shrink for the same amount of volume requires more litho.
As long as the overall cost equation fits, we continue to see also a healthy business. Also, which I was fearing a number of years ago, that our delays in EUV, we may sense that EUV would not be applied for DRAM. I think this roadmap ensures that EUV will also be applied into DRAM, and maybe even later on also High-NA. Here I include the public data from logic producers, there the overall trend is uncertain. The shrink will certainly not go to zero. It will be substantial, still above 20%. Where it will exactly end between 20% and 10% is currently unclear.
To give you a public reference, Brian K, before he departed, was very vocal on the fact that his 10-nm delay was related to the fact that EUV was not there, and created enormous amount of complexity in his device integration, which could have been avoided if EUV would be in time ready. We still have to see, if we would go to full implementation EUV, how aggressive the appetite of the customer is in terms of shrink. That's about to see. The key thing also here is we don't predict the shrink will be stopped any time soon. This is another way of looking to why those advanced nodes continue to be important. You see here the various nodes of the logic providers, I made here the three examples.
I already showed you the iPhone processor, which initially has been developed on the, let's say, a subcritical node, not the most advanced node, but while volume had increased, cost became more important, and today, I think your iPhone processor, I already said, is one of your most advanced processors you can buy. Now, bit mining is the other one. TSMC's talked about in their financial reports. I still believe this is a bit of a hype, but even so, you see Bitcoins start on legacy nodes and very quickly now starts into the most advanced nodes. Finally, which is one of the devices like the Tensor Processing Unit, which is an accelerator for artificial intelligence, is the next wave of devices which technology will be developed on the subcritical nodes, but likely when foundry come up, will become one of the major drivers over time.
That brings me to what it means for us in resolution. So far, what our customers do, this is what we will do for our customers. Here I plotted the resolution of our capability of the various nodes requirements. You see here on top the 3D NAND. The expectation, 3D NAND will never. Well, never. Will unlikely scale down, and if it will be scaled down, it will be marginal, and it will mainly go in a vertical direction, which today is driving also argon fluoride immersion performances, and in particular, the 3D integration requires some specific features t o stay on track with 3D NAND. When it comes to foundry and DRAM, you see here DRAM has been the most dense device.
As we enter the production resolution. You see here that today, [audio distortion] and we are moving to single expose, but you see we use EUV today. There's only a few nodes will move immediately into the patterning, which is not good for cost. [audio distortion] For a total chip, customers will still allow a limited amount of layers over time going to EUV multi-patterning. However, the need of High-NA coming after that to make sure that we see that enhance we have our High-NA tool. Now, this is about resolution. As I said, the overlay is, from a machine perspective, an equally big headache, and some may say even bigger.
You see the slowdown of DRAM and logic continues to stay online, means that in a few years, around this timeframe, you see likely the requirements of logic even more aggressive on litho than it was before. Mind you, even if you have double patterning, with the same resolution on every single machine you ship, you need to support the better overlay. That brings me to a summary when it comes to our scaling roadmaps. You see here the logic, performance memory, and storage memory. You will see in the 3D NAND a continuous use of immersion, no shrink. Micron, Intel, are very vocal on what they call Crossbar, which is one type of a storage class memory. We expect more of that to come. They will start on relaxed nodes, so they will not immediately push resolution because they will develop technology.
It's very likely that those technology long-term will shrink, and maybe even shrink much faster than DRAM will do around the timeframe. This is all speculation. When it comes to logic and DRAM, they continue to be the driver of litho. You see here that logic is even a bigger driver than DRAM. We'll see there's a committed roadmap from customers on logic, starting at seven and to five, and moving up to three to High-NA. On DRAM, we see it will follow shortly. Christophe will elaborate on this. In the course of the second half of the next stage, we'll likely see most of those devices using High-NA. That brings me to our strategy. We haven't changed our internal strategy compared to last year. It's about four major themes.
It's about holistic litho, DUV performance. I say it once more, DUV performance means that we will not see all layers changing to EUV. We'll see a substantial use of DUV layers, which then need to have mix-and-match performance on bleeding edge overlay with EUV. We cannot let down the DUV development until everything moves to EUV, which is still a number of years to come, and it will never come to the point that we will not see immersion to be used. DUV is a very important point. EUV industrialization, which is our current point 3.3. Finally, High-NA, and I will talk in the next few slides on this in more detail. Before going into every one of them, I like to pictorialize our overall strategy, technology strategy. How do we take this.
Traditionally, we were mainly focusing, and it's still our major focus, is litho equipment. In this case, we have to innovate on all wavelengths from i-line to EUV, and this is probably, let's say, 80%, 70% of our work. However, in the last 10 years, we have been very diligent in adding what we call both a competence called computational litho, and we call it today computational litho and metrology, as well a diverse set of products around metrology, allowing us to improve the overall litho performance. For instance, this computational metrology, the computational lithography, is able to simulate the whole image formation in the stepper, and by optimizing the knobs in an efficient manner without doing all the experiments, we can set up a setting of the stepper and enlarge the process window.
By measuring the wafer results coming out of the system and even metrology inside the system, we can control the process window, making sure the systems stay aligned. Having this computational lithography tool is possible to drive the application also in the metrology system to make sure you measure the right thing. We still believe, we advertised this approach already for a number of years, this is important, and it all is there to drive what we call EP. Now, nobody may precisely gather what EP is, so I have another intermezzo here. This is a result. This could be a result of a double patterning process, which normally is very efficient with a space across getting lines and spaces. With lines and spaces, it's impossible to create a working chip.
You have to create some structures, and you do that after a double patterning process like this. You start cutting these lines in a way you can make a circuitry. That cutting is usually done with a second or a third exposure by making a small image here, and you cut these lines in two. You have to reload the wafer after having been processed these lines, and by reload the wafers and re-expose, you have to deal with certain uncertainty, both on the size of the cut as the position of the cut. We traditionally only talk about what we call CD control, the size of the knife, and overlay control, the position of the knife. We're now looking to the accuracy of the edge. We call it edge placement.
If you look, because with cutting, like everything in life, when you start using knives, you need to only cut there where you intend to cut and not get to the good part. If you do that, you pictorial see you have here the intended cut, but you have a tolerance field that you have to both shrink the cut as well tolerance out the cut. As you see in the next animation, if you shrink down, you need to drive down the whole envelope. All our holistic approach is driven to drive down the tolerance of this whole process. Because people say, even we go to single-layer level, we still continue to see double patterning will not be disappeared on certain layer types, certain process types, still prefer double patterning will still be used.
Except at the advanced nodes, like EUV, will reduce the explosion of the unaffordable double patterning. With that, I go on to a number of busy slides, we argue this is the right abstraction level for this audience. Probably not. Since you came all here, I did like to show you that we have a lots of stuff here. I will walk through quick. On the top of the application thing, we have the scanner interface, followed by metrology, followed by inspection, and software APC. We have multiple products rolling out. On the top side of the scanner interface, what we do in the scanner interface, making sure that the knobs on the steppers becomes available and are able to get more sophisticated.
For instance, the correction mechanism on our steppers, as we can drive metrology density up and cost of metrology down, customers afford to get a higher density measurement, we need to have a more sophisticated interface. More sophistication and knobs is driver number one. The second highlight to make is that we have optical metrology, optical metrology is a difficult thing. We'll skip all that detail, one important thing to remember is that even optical metrology is difficult, it's so simple and so cost-effective, it will likely never go away. Therefore, we see a solid in-die overlay. That's why we also need the computational metrology to do the simulation to get the recipe and the marker optimized.
We have been able, over the last couple of years, develop a capability we call in-device overlay, where we don't have to measure on a mark, we measure directly on the device, eliminating the need for customers to give up real estate, we can really measure the overlay where needed. The second point is that we continue to believe that shipping boxes on metrology is not the way to do. We're not shipping boxes, we're shipping capability, we believe that cost reduction of metrology is essential to get the little performance up in a way customers can afford. That means aggressive multi-wavelength, which drives robustness and productivity to make sure we get more points per our measurement, allowing us to get more sophisticated feedback.
Part of that productivity will be done with fast stages. I will name these fast stages a few more times in the following slides. We are moving now to E-beam. We today have probably the fastest E-beam system, which today is fast because the field size is about 100, and field view is about 100 times bigger than a traditional SEM. With that, we are able to develop a better fidelity and metrology control system, which allow us to get integrated feedback, not just to the CD, but the whole better performance. I did not highlight on the previous slide, but we also have a strategic cooperation with several of the processing tool vendors. Over time, we continue to drive E-beam. Some of you remember, I had been talked about E-beam lithography a few times.
I said many times, it will not be able to drive E-beam to the highest productivity. For metrology, it's slightly different because you don't need to have the full wafer be measured, so you can compromise, but you can still drive the productivity up by using a multi-beam. With HMI, we acquired a few years ago in a major effort, to drive the amount of beams, combine it with extensive computational litho and fast stages to make sure we get as fast E-beam system as possible, allowing us to continue to use E-beam in production for various applications. Jim will continue to talk about that.
The final thing I'd like to say is that the model accuracy is a substantial part of the edge placement, and we have to face also an aggressive OPC accuracy calculation, which is being helped by machine learning and these fast sets. To pictorialize it a little bit more detail, this is an example of our machine learning. This is our data-driven fast SEM metrology. This is our physical model capability inside our Brion capability. Combine that in a machine learning system, we are able to substantially drive the model accuracy up. This is a bit of a fight between physical modeling and learning, but we have learned over the last year that combining it with the most advanced learning algorithms, we can continue to drive these OPC accuracy. The second example I'd like to show you the in-device.
I know this is a bit technical, but this is comparing the end device measurement through CD SEM, which is today the state-of-the-art, with YieldStar. You see that the noise on YieldStar is substantially less, and the referee, in this particular case, is an electrical measurement of our customers. We don't trust either one of those measurements. You just go to directly electrical tester device to determine that. This is a major achievement, that at some of those layers, we don't have to go to market. We just look to the device, and with the whole capability of, let's say, the computational metrology and calculating the recipes and the right settings and markers, also the data reduction, we can get these kind of results.
In summary, application goes around four major areas: computational litho, optical metrology, E-beam, and process control, where also advanced learning, almost all the market trend comes back here on the products. Also, deep learning becomes a major part of the advancement here. Optical metrology continue to use, driving productivity for multi-beam SEMs, and extending our process control by increasing our control knobs. That brings me to DUV. You see here, again, the various tastes of machines, non-EUV machines, immersion, dry argon fluoride, krypton fluoride, and i-line. Major theme on all machines is productivity and overlay. We will highlight a few. The 2000, which is our newest model, has been improved up to 275 wafers per hour at 2 nm overlay. We will continue that with new accurate and fast stages, and we will drive commonality with dry by having a common dry wet tool to drive the performance.
A major improvement, which enables us to get to over 250 wafers per hour moving forward, and further improvements to come. On the krypton fluoride, we have a major focal point on making the system suitable or continue to make the system suitable for 3D NAND by dealing with these high topologies and wafer stress. Overall DUV, we have a major effort in driving to machine perfection, drive down downtime, drive up quality, and drive down cost. Give you an example on 2000. We shipped a number of them, and they all, in this case, I showed you the overlay, the orange bars are the match machine overlay, and you see also the improvements through alignment sensor, level sensor, wafer table, and a few other features. That concludes me on the summary of DUV. I think we continue to innovate, DUV.
You see us also not spending less money on DUV than so far, and we don't see that coming soon. Continually that. However, we need to do that for the right cost and at time, our perfection standards are increasing, which makes it more difficult for Christophe to follow Ron, we believe. You see here our progress on ramp-up time at our customers in terms of reliability. Finally, since we will, as Peter shows, slow down potentially shipments over long term on immersion and krypton fluoride, we continue to work on high install base management that can go to the customer and upgrade the systems to higher performance. With that, I'd like to close with EUV. First of all, our 0.33 system. We have been talking EUV works for a number of years.
Partly, it was a substantial amount of hope, I think this year, we have been able to drive these productivity numbers convincingly at customer sites. It has became a major breakthrough on our behalf with the customer. We continue to need to drive the uptime. The uptime is not close enough to immersion. We have to continue to do that. As a result of that achievement, we have pulled in some of the future models, which we planned into next year, where we introduce high productivity, higher productivity, now going up from 125 to 170 wafers per hour at lower overlay. This is, in fact, a reaction of our confidence achieving the basic performance on EUV.
Long term, we are developing a common development between the High-NA and the 0.33 to allow to extend the 0.33 system down to the three nanometer node and over 185 wafers per hour. The reason is that we also believe that the 0.33 system will continue to be used even if customers start using High-NA because of the cost of the tool. Finally, we have the High-NA platform, which is really needed to limit the double patterning. Give you one result on the current shipments. This is the mix-and-match overlay. Mind you, this is not just putting the wafer twice in the machine. No, you are matching this machine to another machine. In this case, the reference wafer has been exposed on DUV. This is an indication how could you do mix and match.
These are very promising numbers, and we have to maintain those promising numbers even when the productivity goes up. This is a bit of a peak view on the High-NA system. I just showed you all the systems. This will be a major effort for ASML to pull off. While doing so, we are trying to get major synergy between our existing EUV program and the future bring to have early implementation of some of those modules, bring that technology early to customer and create value, but also reduce the risk doing so for our High-NA introduction. The bad news of High-NA is almost everything is touched. The good thing, a substantial part, we will also port back on the existing system. Longer term, we see this pictorial, for what we can see on the advantage of High-NA.
This is the effective productivity, taking the double patterning penalties into account. You see a continuously high productivity on High-NA, even to single layer patterning because of the higher contrast. The real benefit starts when double patterning kicks in and even triple patterning kicks in. This particular point is the real triggering point for High-NA to be implemented. We're just on the edge of single layer patterning, you see a huge gap in terms of productivity, and therefore also to cost, when introducing High-NA. With that, I like to conclude to say that we have two accelerated programs in place, both the 0.33 and the High-NA. The 0.33 is all about uptime and getting the productivity up, and getting the system extended to the 3 nm node.
Here, we have system design completed, because of our success earlier this year with the breakthrough on the productivity, we're able to get major customer commitment. We have a total of EUR 1.5 billion customer commitments in the start of this year, being able to lock in our High-NA development, which is very important because this is a very complex program, we are continuing to work very closely with ZEISS, a corporation we announced, I think, a few years back, but it's also around High-NA. That concludes my talk, because this is a repeat of my first one. Thank you very much.
Thanks. Good afternoon, everyone. I'm Christophe Fouquet, and I'm responsible for EUV in ASML. I think Peter and Martin has already hinted the fact that this has been a very good year for EUV and ASML, and both our customer and ASML are very excited, in fact, about the progress done in the last few months. I'm going to spend the next 25 minutes trying to summarize for you both the progress we have made, but also the opportunity moving forward. Before I do that, I'd like to spend a few minutes maybe explaining or summarizing what really changed in the last 12 months. The first thing, there used to be many questions, many debates on how far multi-patterning can be extended.
I think Martin was mentioning the very public statement by Intel, by Brian K., that 10 nm is most probably the last node that can be done without EUV, because the complexity of 7 nm with multi-patterning will just be too high. The question about how far multi-patterning can go is answered. EUV has to be used for 7 nm, and we see all our logic customer moving very aggressively to EUV on those nodes. That's the first thing. The second very important thing is that customer are ramping. For many years, we talked with you about EUV, and we had the if, will EUV work? We had the when question, and those question has been answered as well. Now customer are ramping, and probably the next discussion we're going to have together with you is how fast and how much.
The answer to those questions will be basically how successful we are in our industrialization, which is ongoing, and we'll talk quite a bit about that. What does industrialization means? It means that we now have to bring this technology to high volume manufacturing. We need to show good productivity to make it economically viable for our customer, logic first, and then DRAM. We need to make sure the tool is running well, have good availability, and provide good yield performance. This is basically the work we are doing today with our customer, and it's well underway. I will also explain you that in order to run EUV, you don't only need a scanner, you also need a whole infrastructure. Today, we don't see any showstopper anymore. Everyone who needs to support EUV is ready to do so.
All of this means also that our own confidence in EUV, as Martin mentioned, has increased. You can see that by the fact that we decided to accelerate our roadmap. For many years, we struggled about power. We struggled to achieve a certain amount of productivity. Right now, we are planning to go to 170 wafer per hours as early as next year. This is, of course, a major improvement for our customer. This is good for logic, but as I will explain later on, we also believe that this will open the door to DRAM even wider. This create also additional opportunity on the market. On top of that, because we start to master this technology, not only we believe we can go to 170 wafer per hours, but we also believe that our technology, our 0.33 platform, can be extended further.
We are already working, as we did in the past from deep UV, on more product, more innovation, more improvement. We start, I will say, to move a little bit EUV to another ASML product with a roadmap, with improvement that will come every other year to support basically our customer need for overlay and productivity improvement. On top of this, Martin mentioned it, we work also on High-NA, and why is that? The reason for High-NA is the exact same reason as 0.33 EUV today. We know today that multi-patterning beyond three mask is not a great idea. This scheme for logic, even with 0.33 EUV, will come back around 3 nm node. When it comes back, there again, we need to be able to make a step, and this is High-NA.
This is why in parallel to the 0.33 platform, we also started to aggressively work on the High-NA program. All of this is good technology-wise, but of course, it also give us an opportunity on the business. Putting the technology in control means we can create more value, means we can put our cost in control, and this also provides a nice gross margin opportunity for EUV. This has been also a discussion we had with you for many years. How far could we go? How quickly? Today, when we look at the target of EUV regarding gross margin, we plan to be at least at the deep UV level, meaning at the level of high-end product in ASML. This is a little bit the change, or I would say the theme I'm going to develop in the presentation. Starting with EUV lithography.
Why do we do that? Very simple summary about the value, I would say, of EUV for our customer. We talk a lot about cost, and I'm going to show you some cost comparison between EUV and deep UV. i would say the most important thing when it comes to EUV is the simplification. It's good that EUV is cheaper than deep UV, but what logic customer are really looking for is the simplification. Using four, five, six masks for multi-patterning is just not going to generate very high yield, and that's, again, the Intel statement. First value is simplification. The second one is cost reduction, which come out of the simplification. Depending on the application, the layer, you look at 15%-50%. Third point is the cycle time. For foundries, for DRAM customer, cycle time is very important.
Of course, if you're going to use less mask, less process steps, you're going to be faster basically to get to the end result. There's also a very nice cycle time improvement, three to six times, on the very critical layer. Finally, I think M artin was showing some overlay number, this tool has to provide the very best lithography performance. This is already the case when it comes to overlay and imaging performance. This is the reason why if you look at 7 nm logic, then 16 nm DRAM, our customer are basically planning to introduce a tool in the coming months in high-volume manufacturing. Talking a little bit about our customer. I wanted to start by first a simple graph. What you see here is the cumulative number of exposed EUV wafer. We started to count this number you see in 2011.
Total today is 3.2 million wafers. If you compare to what we expose every day on deep UV, it's of course still very small because these are still, I would say, R&D numbers. What is very interesting is that out of those 3.2 million wafers exposed, 1/3 of it has been done in the last six months. We see a major acceleration at our customer in R&D still, basically on the number of wafers being exported. This means that those guys are getting ready for EUV in volume manufacturing. This is confirmed. We picked here a few quotes. TSMC, who is very public about starting to run EUV this year for 7+, and then next year for 5 nm. Samsung very recently announced the exact same thing, and also their plan to extend their EUV capability for 7 nm.
Finally, Intel, we talked already about this a few times, 10 nm will be the last node without EUV. You see the three key logic customers very publicly almost being in a race to implement EUV in the coming year. Now they're not only talking about it, these are basically what's happening on the ground. This is a picture of the fabs they are building. Intel, Samsung, SK hynix, and TSMC. Those fabs will open sometime between 2019, 2020. Again, there's a bit of a race there between our customer. This set of picture here represent a capacity of more than 200 EUV machines. They are creating space, basically, they are planning for EUV to run in a high-volume manufacturing. Last point about our customer, the number of EUV layer they are planning to put.
When we started to work with logic customers, they had a certain idea for 7 nm of how many layers will be used with EUV. Today, on the exact same node, 7 nm, we have seen an increase of about 30%. The number of layers where EUV is going to be used is in fact increasing over time based on the performance this year on the initial one. We still see additional opportunity even for 7 nm node, because some of the layers are still to be defined. If you look then at the next node, 5 nm, we look at at least 50% more EUV layers. The transition to EUV at 3 nm would be even more dramatic. At 5 nm, it would be even more dramatic. This is for logic. Same picture for DRAM.
DRAM is a little bit behind because I would say the motivation for EUV is different. It's mostly driven by cost. There's still plan to introduce this around 16 nm, and an opportunity to increase the number of layers at this normal by a factor of three. Again, moving forward, you look at 50% more opportunity in the next node. Now you notice that this DRAM number is a little bit lower than the logic one. Be aware that the volume, on the other hand, is a lot higher. If we look at the total number of tools, which is what we try to do with this slide, you will see that for a logic fab, for a fab capacity of about 45,000 wafer starts per month, for 10-20 layers, you need about 10-20 tools.
For DRAM, for a capacity of 100K, one to six layers, you will also need two to 10 systems. This is a little bit the range of opportunity we have basically on logic and DRAM. Moving to the industrialization. This is still, I would say, the major focus of our customer, of ASML on EUV. Few data points I'd like to share with you. The first things, we talked a lot about wafer per day in the past, because wafer per day is basically the ability of our customer to run the tool in high-volume manufacturing. The more wafer per day, the lower the cost of the tool. What you see here, this is data from one Logic customer, is that on the 13-week basis, this customer has been running routinely more than 1,000 wafer per day.
This has been for a very long time, the magical mark, if you want, for EUV at Logic customer. These are still R&D run. If you look at the capability, it's more than 2,000, and we have been, in fact, capable to measure that on very short time at some of our customer as well. These are, I would say, very good and healthy sign. This type of data are the data that help our customer to move and move faster on EUV. The next graph is about availability. What do we see here? This is the system. This is our source. Both are climbing. Major progress. It's still a little bit below target. One of the reason is that there's still a lot of work being done to improve those tool on the ground. At this point of time, availability is not a showstopper.
We are still going to improve it. We're still going to aim to go to deep UV level, because this is what our customer would like to see. At this point of time, this is in no way a showstopper for customer to start running EUV in manufacturing. Looking at the bigger picture, now the EUV infrastructure. I told you before that a lot of things had to be ready for EUV to work. Mask technology, inspection technology, et cetera. We showed you this slide, I think, for the last few years, and we used to have a lot of red or question mark with showstopper. At this point of time, we don't see any, and we don't see any for the next few nodes. What does it mean?
It means that all the supplier that are involved basically in developing this infrastructure also plan on EUV introduction. They have step up their investment, and they have also made major progress basically to support the EUV introduction. You see here, it's a lot of different companies. This was a little bit of the challenge, if you want to start with. This is also one of the reason why today this is ready. I will focus on one of them, which was defect performance. Defect relates to yields. If we have too many defect, the yield is going to be bad, and customer will again move away from EUV. Two things we are doing. The first one is reducing dramatically, as you see it here, the defect level on the scanner to the level where some of our customer believe they could run the tool without the pellicle.
The pellicle is basically the thin membrane that is going to protect the reticle during high-volume manufacturing. For the customer who will want to use the pellicle, logic customer on very critical layer, we are also ready to provide them this, as of today. Those customer already in some cases run a pellicle as we speak. Roadmap. This is a little bit looking back. I think you've been aware, some of you, I guess, have been following EUV for even longer than I did. It all started, Martin will tell me, it started long before 2006, in fact. It started with our customer in 2006, where we shipped basically our first demo system. Then we had, I would say, a series of three systems, the 3100, 3300, and then we had even a 3350 here to, I would say, help our customer develop the technology.
None of those tools, you see it here, were shipped in a high volume, the reason for that was they were not capable to run production. Availability was too low, productivity was too low. In 2017, we started to ship the 3400B, there are now several systems on the ground. By end of the year, we'll have more than 25 of those tools at customer. This is the first real production tool. This is the tool that can allow us to meet the productivity and the availability requirement. Martin already showed the roadmap. I'll come back to that as well. We also plan to extend this tool further when it comes to speed and availability. This is the tool we have today on the ground. Moving forward, we are going to further work on speed.
As early as next year, we are going to ship the first 3400C. This 3400C will provide higher availability. We believe we are going to pass the 90% mark because we have redesigned some of the element of our source in order to do that. It's also going to provide a very nice improvement on productivity, which when it comes to the DRAM, and I'll come back to that, will be very important to again open the business opportunity there. This is not the end. We already have planned to go even above 185 wafers per hour. 3 nm will also see the introduction of the High-NA tool, as Martin mentioned. As he also mentioned, those tools will then be used in parallel by our customer to optimize the overall cost of lithography moving forward. One slide about High-NA.
Why High-NA is important? Same reason as before, process simplification. I told you before, today, all customer understand that at 7 nm, they need EUV. They need EUV because they don't want to use more than three masks in multi-patterning. Martin said it, EUV will very quickly move to double patterning and then triple patterning. Around 3 nm node, the logic customer will again need more than three masks in order to do lithography. The only way to solve that will be higher resolution and therefore, High-NA. Here again, when we look at cost, what you see here basically is the relative cost of immersion versus 0.33 NA versus 0.55 NA in different configuration, one mask, two, three, four. You see that the 0.33 NA cost-wise is beneficial beyond three masks.
What you see here is that when we move to High-NA, the cost benefit will be even higher. We say the switch cost between 0.33 NA and 0.55 NA will be even lower than it was for customers to switch to 0.33 NA. Very strong cost motivation, cycle time improvement again, and once again, very high overlay imaging performance. All of this, and the anticipation basically of the need to avoid, again, complex patterning scheme, have led our major customers to already commit today to High-NA. This has been announced in the past. We have three major customers will work with us on High-NA, and we have a total of up to 12 systems already committed in the next few years. There's a very early commitment, basically, to this technology. Making progress on High-NA. This is also not only words.
These are a few pictures of some of the tooling. This is a picture taken at ZEISS. This is one of the tools we are going to use to ensure the accuracy of our mirror. You see the size, and you can imagine the complexity of this technology. This is why also we start to work on it today. This is a picture of one of our first proto High-NA mirrors. We are starting, basically, if you want to build already the lens we will need for this tool. We have a lot of attention and also investment already on this technology.
A few weeks ago, we also announced that in order to give access as early as possible to our customers to this technology, we will create, together with imec, a lab to give basically our customers access first to EUV as we have it today, and around 2022 to the High-NA platform. We are going to make, I would say, the platform available for test, for qualification to our customers here in Veldhoven as quickly as possible. This is for the roadmap. I have a few words now on our profitability. The first thing I told you that we're going to work basically to improve our productivity. We're going to have an aggressive roadmap there. This is what you see here. We plan to do several steps. I show you here basically the productivity in relative numbers. We start at 100% today for logic.
Blue is logic and green is DRAM. They have slightly different conditions, we represented them differently. We're going to go to 155, which I think you knew already. 170 wafers per hour, above 185 wafers per hour. As you can see, this will happen in the course of the next 18 months. It's a very fast introduction of productivity improvement. At the end of the day, if we look at logic, in the next 18 months, we're going to provide 75% more productivity. When it comes to DRAM, we are going to more than double the productivity. This, you understand, for customers like DRAM, where cost is a very important factor to make the choice on a lot of EUV, this will, of course, help dramatically to increase the opportunity of the EUV business moving forward. How do we do that?
That's also important. We do that mostly by improving our optical elements. This is mostly about coating improvement. No big change also to the tool as I show you that. It's not like we're going to redesign a whole new platform. We're going to keep the tools as it is, we're going to keep the scanner as it is, and we are just going to make some smart improvement in order to get more productivity. The risk of this on the implementation is also very limited on our side. What works for the tool productivity will also have a benefit for service. I think Peter explained you in the past that the service is based on a pay per wafer, which means that the more wafer we are going to expose, the more-
The errors. Back in 2005, when ASML's products portfolio was just primary- On target, we can deliver value, and right now we're addressing about 90% of that required budget. Another way to look at it is schematically. In the fab, you have the litho system, and eventually, I'll fill in here to the right etch systems and the like. Where we started after the acquisition of Brion is we used computational lithography to be able to create the optimized masks, which could be delivered to the scanner, and then also tune the knobs on the scanner in order to provide best possible printing performance. The next step in assembling the applications product portfolio was to measure after litho. This is where we use the YieldStar optical metrology system.
We make measurements after litho, typically on targets or marks, not actual device patterns, but proxies for what the device pattern looks like in order to measure things like overlay and focus. We bring those back through a control loop using algorithms, and then we correct the scanner. We measure on one lot, and then we feed back a correction control loop to the next. With the acquisition of HMI, it gives us the capability to use the resolution benefits of E-beam metrology in order to make more precise measurements after litho. It also gives us another thing, which is to measure after etch. With HMI, we can measure after etch in the manufacturing process. As Martin showed with YieldStar optical metrology, which is extremely cost-effective, we can also measure after etch and bring those control loops back.
E-beam metrology, there's a resolution throughput trade-off that you make there. Very high resolution, not so fast throughput. What we do with the computational lithography in the next build-up of the applications product portfolio is we guide the E-beam only to those places on the wafer that are most interesting. We get the maximum amount of information in the minimal amount of time. Last but not least, there's an opportunity because patterning and what customers really care about in terms of etch placement error occurs after etch. There's an opportunity to co-optimize both the scanner and the etch system together. Right now, we're actually working collaboratively with an etch supplier at multiple customer sites to prove the value of co-optimization of litho and etch. This is how the applications product portfolio gets assembled.
What you see here are not only point solutions and point tools, but the control loops, the algorithms, the scanner interfaces, and the computational models that pull the whole thing together. Sorry. ASML is uniquely positioned to pull this strategy off, and the reason is because the scanner is the one place in the fab that's uniquely able to find, measure, and correct for patterning variations. What you see in the TwinScan setup, the metrology stage measures 100% of the wafers. It gets information on 100% of the wafers that flow through the fab. More importantly, on the exposure stage, we actually can control each and every field on every wafer that goes through the fab. If we want to correct one wafer different from the next wafer, we're able to do that.
If we want to correct one field different from the next field within one wafer, we can also do that. It's the litho tool that has that unique capability with all of the correction horsepower that we have that allows us to close these control loops and deliver the value and deliver the customer's requirements in terms of overlay, focus control, dose control, ultimately, etch placement error control. Here's how you see the on-product overlay budget building over time. Back in 2008, in the high volume manufacturing node at the time, overlay, the requirement was about 16 nm, which means if I'm trying to put a pattern on the wafer somewhere, if I put it within a 16 nm zone of where the optimal place is, my chip will still yield. That's a 16 nm sort of tolerance of the budget.
It goes all the way down to 1.7 nm in the 2022 timeframe. In order to pull off this roadmap, we have a lot of work to do. Back in 2008, the number of correction parameters per lot that ASML used to work with their customers was about 55 correction parameters per lot, and maybe on the left-hand axis, you can see the scanner actuations per lot in thousands, maybe about 500 different scanner actuations per lot. How does this build up over time? What you see over time is a dramatic increase in the number of correction parameters per lot and the number of scanner actuations per lot.
What that does for you, that exquisite control that we're able to affect in the litho system, is it gets us the resolution we need, or it gets us the overlay control and the etch placement error control so that you get that fidelity that you see in the image in the top right. This is how pattern fidelity gets improved as we drive down things like the on-product overlay budget. Martin also made the point that there's tremendous value if you can measure after etch, right? Measuring after litho is a big part of the story, it's not the entire story.
Measuring after etch takes into effect what can go wrong or what gets changed in the etch process. What you see here is the overlay map of a wafer after etch, and also a map of the number of good die in spec. If you have overlay after etch measured at something like 5.3 nm, you might have 61% good die in spec. You have a little bit of a fuzzy image. That's based on using low-order corrections per wafer. You don't have a lot of granularity in your correction capability. As you are able to measure more after etch, using, as Martin described, the ability to measure the actual device. Now you don't have to consume really expensive real estate in the die with targets or marks, you can actually measure the device.
For memory devices, this is a fairly straightforward thing to do. You can go to higher order corrections per wafer, which improves your overlay performance, which improves your yield. Ultimately, when you go to the highest order correction per wafer, you can drive your performance better and better. Cost-effective metrology after etch, you can measure in die, so you can get very deep, very precise, high spatial frequency measurements, which can lead into high-order corrections and improved performance. This is what we do in the applications business. We put all of this stuff together, we prove it on wafer with the customers, and we help them get to the next node. Now, if I do a transition to talk a little bit about E-beam and what are we doing with our E-beam portfolio.
Multi-beam E-beam is what's required to support both R&D and HVM defect inspection in the 5-nm node and below. Here's kind of the layout. If you look at the design space of the area throughput, how many wafers per hour you can inspect versus the sensitivity resolution of your inspection tool. Today, inspection tools are dark field tools, bright field tools, relatively high throughput, but sensitivity limited. They can't see very small defects just because of the limit of optical performance. E-beam gets us past this key threshold, this 10-nm sensitivity or resolution threshold. E-beam, single E-beam, can see things very well, but the throughput is not so high. E-beam is a fairly slow tool. What multi-beam is going to do is it's going to kind of change the game. It's going to keep us in the side of this graph where resolution is key, right?
Some people might prefer the term signal-to-noise, right? You get more signal to noise at very small structures. Multi-beam is going to give you that two to three order of magnitude increase in throughput that's going to provide the cost-effective way to do HVM defect inspection. It's not only about defects, it's also about measuring patterns on the wafer, so that measurement of the pattern, in terms of pattern fidelity control, can in and of itself be used as the control loop. Our multi-beam value proposition is based on 3 pillars. First pillar is the SEM, the optical column technology that we have in our HMI division. HMI was, I guess you could say, the winner in the single E-beam inspection market. HMI was formed in the late 1990s, had a lot of success. We're happy to have them as part of the team.
We can combine their technology in with the SEM technology, with ASML's world-class stage technology, coupled with the software and simulation capability that we've been building in the application space here at ASML for the past 10 years. We think we're going to have a really strong value proposition going forward in multibeam for inspection. This is how we see the multibeam inspection roadmap developing over time. Where we are today is over in the bottom left. You have single E-beam, and it's basically used for defect discovery and, in some cases, guided inspection defect monitoring. We have an active program where we have team from our Brion division in San Jose working with the HMI team in what we call pattern fidelity monitoring.
What we have here is we use the computational simulation to drive the E-beam to specific points on the wafer where we think we might be in a borderline sort of mode. Then take the measurements there. There's no need to inspect things that you know are going to be imaged well. You should only inspect the things that are marginal. We can get a little bit of an improvement in the effective sampling by doing that. When we go into the multibeam generation, you'll start to see first multibeam for defect monitoring. We'll start with three by three multibeam. We have a roadmap that goes from three by three to five by five, 11 by 11, which is 121 electron beams in parallel, all the way up to greater than 400 beams.
Then finally, we put the computational software with the multibeam. We get that really large improvement in effective sampling. That's what's going to give us the ability to then close the loop and monitor pattern fidelity in the fab. The multibeam is going to provide the volume and the quality of data after etch to enable defects control in HVM. I'm going to go to a little bit higher level of abstraction on this chart. You've seen this one before from Martin. Basically, the scanner interfaces and control software going forward to 2025, we want to talk about increasing scanner actuation on both the DUV and the EUV scanner. We want to talk about etch co-optimization with our partners, our peers in the industry. We want to talk about edge placement error control.
These are all the things that we're going to be working on in the next five or so years. For the optical metrology system, it's about faster stages, it's about multiple wavelengths, it's about computational metrology. Measuring in-device. Fast stages to reduce the cost of metrology. If you can reduce the cost, you can do more metrology, which then allows you to do more precise correction because you have the data that supports good control loops. Multiple wavelengths for robustness, in-device, again, for measuring after etch. For E-beam defect inspection, we have our multi-beam roadmap. Also the fast and accurate stage technology that ASML brings to the party, and the guided inspection from our software products. In our process or in our E-beam metrology, this is inspection.
In metrology, we have that single E-beam with a very high resolution, with a large field of view, we can do things like measure millions and millions of structures in a reasonable amount of time to feed that back to the process development experts. Finally, computational lithography, Martin talked about the importance of improving the model, the OPC model, because that's one key element of the EPE budget. We'll do that improved accuracy. We'll use some more sophisticated techniques, including machine and deep learning. The Brion organization in San Jose is one of the centers of expertise in ASML, in machine and deep learning and applying it to this whole product portfolio. What does it mean from a business perspective? If we think about the four main parts of the applications business, you can think about scanner and process control software in blue.
You can think about computational lithography, which is in that yellow color, the optical and E-beam metrology is in orange, then wafer and mask inspection is in gray. What you see here on the left is the total addressable market, the TAM, by market segment, with the sum in 2017, 2020, and 2025. You can see some nice growth in the total addressable market. Even given that nice growth, we expect to grow faster than the market is growing. We expect to continue to be successful, continue to grow at the 15%-20% CAGR that we have grown at in the past few years. We expect growth across all parts of our portfolio, but the main driver of growth is going to be the metrology and the HMI inspection products. We also expect the very strong gross margins in the applications portfolio to continue.
Helping customers stitch all of those points of the triangle together and creating that value, it provides substantial value to our customers, and that's reflected in the business results of the applications part of the ASML portfolio. In summary, we're driving the holistic lithography roadmap. We're driving edge placement error, and we're driving pattern fidelity control. We're doing that not just around the litho system, but now we're taking it all the way to post-etch. Very good year this year. We expect it to continue. We talked about the growth drivers, what we're trying to do in applications. Finally, we're going to be growing at that 15%-20% CAGR through the period 2017 to 2025. Thanks for your attention. I'm going to introduce Skip back up to the podium.
Thanks, Jim.
Yep.
All right. We're going to take about a 30-minute break, so about 15 after the hour, we'll start moving back in here, and we'll resume at 3:20 P.M., with EUV Ron, and then we'll have Roger Dassen, and then we'll finish with the Q&A. See you back here in 30 minutes.
All right. We're going to show a video here, maybe a little introduction on the video. Investments, obviously, in technology are one of our key strategic pillars. We hold an annual technology conference, and it's really one of the largest technology conferences of its kind. We have about 4,000 people, I think, this year that engaged and basically shared their ideas on innovation and different future industry challenges. It was our 19th annual conference this year, and the theme of the year, the conference was More to Explore, which not only means continuation and extension of Moore's Law with EUV, but also means the many opportunities to explore across our full holistic litho product portfolio. With that, I'd like to show a short clip from the tech conference.
ASML is about innovation, is about exploring. There is no magnetic north. All three business lines have their own territory of exploration, and they're also working together to form a holistic lithography solution for our customers.
With the double the capacity, that means this conference seems to be attractive for a lot of people to attend.
Exciting when you're in a hall with 4,000 people and realizing that the chairman tells us that it's the largest single meeting in the world now, then you realize you're part of a special company.
We are the biggest developer conference on this planet.
Just to see so many people being enthusiastic about their work is really inspirational.
I was wow, impressed, really big.
Well, this is, well, typically like a big conference. We have so many good presentations to share that we have to run them in parallel. There will be an EUV session, and in parallel, we have a session on apps, on overlay, on productivity, on software. You have to choose the topic you're interested in, or this is actually a good opportunity, go to something you have no clue about and find out. This is your moment.
The conference gave me opportunity to see the big picture and align. Hopefully gaining the activities in future to this big picture.
Proud of what we do. We can share our challenges. We may find colleagues that actually may help us. A unique place to be.
Nice video. My name is Ron Kool. I'm responsible for the deep UV business line. Deep UV, as mentioned, workhorse of the industry, dry systems, immersion systems. Particularly if you look to the immersion systems, the revenue there at this moment is about 50% of total revenue of ASML. It had been growing quite substantial over the last 10 years. There is also a very important driver of the growth of ASML. Looking forward, if you look to the next five to seven years, we expect that the sales of deep UV is expected to remain important, be it there is a change there in terms of how it's composed. Currently, mainly systems, and if you look in this period, there will be a transition to systems, I would say, to a 50/50 share of installed base management sales.
We're developing, therefore, particularly if you look to that, I would say, substantial amount part of the total revenue by the installed base. We're developing very much the service and upgrade portfolio to exploit that installed base. If you're looking to that transition, challenge is there to maintain the margins. We think we're very much prepared for that. We have a good innovative technology roadmap, very much aligned with the customer roadmaps. We are exploiting as much as possible the commonalities between deep UV and EUV, and in order to exploit the more mature state of this business line, we're also looking to the improvements of the operations, getting more lean, being more efficient and driving the quality of the systems. If you looked at the roadmap, already went into this buildup.
If you look to the left in terms of the wavelength, immersion part, this is all dry. Here you see the, I would say, the product per wavelength over time. Currently, this year introduced the 2000 ramping up. I'll come back to that. Very much a drive there, on the high-end side, on the overlay numbers to 1.5 nm and to the throughput. There you see that particularly in order to be able to match to the EUV systems, if you look to the future, that these overlay numbers there in terms of the target to be met are quite challenging. Also that means quite a lot of innovation needed on the deep UV systems. If you look to the ArF system there, I can summarize it in terms of extending the overlay and focus, particularly multiple patterning is there.
I would say quite stringent in terms of having requirements on those parameters and match the overlay to match to EUV. Of course, extending the throughput there. Throughput I showed you here in terms of wafers per hour, the customers are pushing very much also for wafers per day. There you see there are more possibilities actually to increase there. If you look to the next line, ArF. ArF dry, so the top level is ArF with immersion. This is the dry. You see there the systems, 1460, and what was mentioned particularly for the ArF, going to a common platform meant to be a common platform with the ArF immersion called the NXT platform. Also there you see quite a step to be made going to that platform with respect to the throughput.
Going from, let's say, a level of about 200 to substantially above 250 wafers per hour, and also making a step there in terms of the overlay. There, I would say it's also the same is applying for the, I would say, the High-NA on KrF, extending the, I would say, the overlay, in the sense of decreasing the overlay, for shrink and extend the throughput in order to produce more cost-effective. Workhorse on the KrF, is the 860. You see there the M in terms of we follow the alphabet, 860M, followed by probably a next one. I think you can guess how it's being called. What you see there is in terms of the throughput steps still to be made also. For the i-line, same kind of a story. Particularly there, what is driving this market is cost-effective production.
It's not so much the gain anymore there in terms of having very, very strong steps in terms of overlay. That game is done. There the game is effectively get your, I would say, get your operational expenditures for the customer, get that in order. The 2000, it was a little bit as a small slide shown earlier, but I think it's good to show here what the capability is that we're having. If you look to the 1970, you see here a time scale of just over a year. If you look to the reliability, let's say, to reach an acceptable reliability for the customer, which is about, let's say, 100, 150 hours MTBI, in terms of between interrupts on the system. It took about more than a year.
The next generation, the 1980, you see already a speedup in that ramp time to about half the time, 24 weeks. If you look to the 2000, we did it in 15 weeks. In 15 weeks, we were able to come to that level of performance. If you look to that productivity that we ramped up for a customer, in terms of the wafers per day that he was able to produce, you see that on the left, on this graph, on the bottom graph, the system was transferred to the customer, and it took about 13 days, and then a throughput level, output level of about 4,600 wafers per day was being reached. That is quite a fast, steep ramp-up for such a very new generation of systems.
If you look to the deep UV, the focus on the one hand side, keep on continuing innovation, because still, I would say important steps to be made. On the other hand, it says here cost leadership, I would say, cost to run the system for the customer leadership. Get your operational, the cost of running the system at the customer site, get that very attractive. 2000, we've got a leadership there in immersion. What we're introducing, have been introducing is sensors to improve the alignment, to improve the overlay, and particularly also on the focus and leveling. I would say at the heart of the system performance, laser innovation also there in terms of coming to smaller bandwidth, still steps which are very useful in order to come to better performance.
If you look to the next generation, what we have on the roadmap, we make steps on the wafer stage. Wafer stage, of course, I would say, crucial in terms of a litho system supporting the wafer in the system. We're going to introduce there a step up with respect to the lens performance, provide more manipulators to even better control parameters with respect to the imaging, but also there with enabling extensions on the portfolio of the application colleagues. Because the moment we got, I would say, new knobs to correct specific parameters, that has a lot of value to the customer. I talked about the 1470, so on the ArF, in terms of the ArF dry. We're going to bring that also to the NXT platform. That's a common platform I just mentioned.
To get to KrF, what we see is, and that you can see that on this graph, still we're making substantial steps in increasing the throughput of these systems. It's mentioned here, a CAGR of about 7% over the years and a performance of over 5,000 wafers is actually substantially over 5,000 wafers peak performance that we have seen. As said, what you see here, it's not just wafers per hour that we're focusing on. It's particularly also the wafers per day, which means that the cooperation in terms of how is the customer effectively handling the system and dealing with that in our system, having a better, I would say, the better capability there is even helping to increase that number of wafers per day.
Another thing is what we see is 200 mm is not that, and the XT platform, where in particular you see the applications there which are for the 200 mm, is very much able to deal with these 200 mm demands. 3D NAND was mentioned. I think this is a nice example where you see that innovation is still needed, also on the KrF side. 3D NAND, what you see is, of course, stacking. A lot of stacks before you get to the next litho step, which means that 3D NAND is having some characteristics in terms of dealing with wafers of this kind. There's far more wafer stress induced into the wafer, resulting in warpage. So effectively, a wafer is not flat anymore. It's really like a bow or a hat. The system has to be able to deal with it.
I mean, the first thing is, of course, the wafer has to be able to go through the system, and you have to take quite some modifications in the system in order to deal with this relatively big warpage. Higher aspect ratio, which means challenge for the alignment system. If you look to the topology, the leveling, the whole focusing, you see all these kind of, I would say, specifics for this 3D NAND, or I would say more specific than for the other applications, means modifications in the systems in order to be able to deal with this. I talked about the commonality. On the left-hand side, the deep UV, on the right-hand side, the EUV, on the bottom, you see verbalized what the differences are.
I think noteworthy, particularly EUV operating for a big part internally, in a vacuum condition, which is, if you look to the deep UV atmospheric. Sensors we are able to develop, which can be used in both platforms. That is, I would say, a between-platform synergy that we're able to exploit, which means that, for instance, an ORION alignment sensor has to be able to deal with those two environments. I talked about workhorse. This is very much illustrated in this graph that you're seeing here. On the left-hand side, you see those machines, number of machines, that are producing more than 1 million wafers per year. You see that over time, effectively, that number of systems is increasing substantially. Last year, it was more than 700 systems that were able to produce more than 1 million wafers per year.
If you look to the right-hand side, 140 of those actually were able to do more than 1.5 million. We're, I would say, at a point that we're actually going to cross the 2 million wafers per year boundary. What is interesting is, if you look to the set, a lot of those, in terms of 1.5 million wafers per year, effectively are NXT. You see that it's also for the immersion system that we're able to come to high productivity numbers throughout a whole year. Just putting that in perspective, because this is, I would say, great building achievements. If you look to it and you see here on the Y-axis, you see the height of the towers.
If you take a system, I just mentioned, in terms of a 1.5 million wafer per year system, actually, you come to a stack there in terms of wafers, which is over 1 km. It's impressive in terms of how much is going through these machines. I talked about the revenue trend of deep UV, where there will be a switch in terms of particularly system-oriented. If you look to the left here, in 2018, let's say about 80% coming from the system, 20% coming from installed base management. That is going to change over time. If you look to 2025, we expect it's going to be about 50/50. This means, of course, in that sense, yes, we have to continue in terms of, I would say, the system side, but more focus there, which is coming to the installed base management. It's growing substantially.
If you see per year how many systems are going out, this is, I would say, interesting source for generating revenue. Also in particular there, not just the services, but also in terms of the upgrade products. I just talked about the 3D NAND. It's not just new machines, because also those machines in the field, what I just said in terms of these aspects to be dealt with, they can be provided to the customer in terms of options. That gives also the possibility to upgrade those systems in the field. What you also see over time, these systems get older. I'm always impressed by that. If you look to these systems, they're running for years.
If you look to TWINSCAN, I think it's only the first TWINSCAN systems which effectively only had one stage that we took back, and for the rest, they continue to run. There is also, I would say, a possibility to every time find new possibilities, particularly when the system gets older, to do, I would say, refreshment on those systems. Which brings me actually to this slide. It's giving a 1980 as an example. It starts on the left-hand side here with the initial sales, and over the time, it gives aspects in terms of how to exploit, I would say, when the moment that system is in the field, how to exploit that system in terms of generating revenue and generating value for the customer. These systems are going to be relocated. That's what you see. They don't stay in one fab.
At a certain point, the customer says, "No, I'm going to move it to another fab." Of course, the service contracts, but there is a lot of refurbishments, there is a lot of upgrades. If you look to it cumulative, we're talking about that such a system, after the initial sales, still generates more than 50% in terms of extra revenues, where I think this is on the conservative side, because what is being, I would say, facilitated by these systems in terms of the applications revenues is not really even taken into account here. In that sense, it's a conservative kind of a number. This is, I think, illustrating very much the upgrade potential of these systems. What you see here from top to bottom, you see the first years of shipment. You see the machine types.
You see that over time, associated with the newer machine types, you see on the one hand, a higher throughput number that is coupled to it. Also, if you look to it in terms of MMO, which stands for the matched machine overlay, the overlay number you see that's improving there. What these systems are giving, for instance, if I take a, well, whatever, a 1950, you see I can, by means of an upgrade, I can come to a 1970. These upgrade packages also help very much to, I would say, facilitate the economics for the customer to come to the next node. These are not small packages. If you look to it, a number of those upgrades, big upgrades we're talking about, they relate to about 40% of the whole machine that is being swapped. It's quite big.
If you look to the service products beyond standard service, I think this gives a nice impression there. In terms of systems availability and stability, these systems are indeed the generators for the industry. They have to be up as much as possible. There is a lot of focus there on the availability, but also in terms of the stability of the systems. Output, as you just said, not just wafers per hour, in particular, look to the possibilities to come to wafers per day. Therefore, particularly in the multi-pattern situation, shortening the cycle times is very important in that situation. Data products. Customers, of course, asking, "Please give more data." Everybody's infected with big data. Get data out, ensure that the control loops in the fabs can deal with those.
Hybrid service, particularly for simple kind of service actions that customers are able to do it themselves. Relocations, I mentioned. Yes, that's quite a lot of relocations happening in the fabs. China. What is showing here, on the one hand, on the right-hand side of this graph, you see China. You get an indication there in terms of what fabs we're talking about, what customers. You see a mix of customers where headquarters is based outside China, whereas with customers with the headquarters in China. On the left-hand side, you see a graph there in terms of the system sales we're doing over time. You see very clearly 2008 standing out relative to the previous years. You see also in terms of the number of employees, how much we have based in China in order to support the systems.
We've got quite some offices there, because that's the big thing. When is it really going to start? I think we're courageous enough to start an office there, ensure that the customer there really can start his operations. As I said, we're currently about at 1,000 employees. In summary, if you look to deep UV, immersion systems are particularly, I would say, still a big driver for the ASML revenue, has been very much for the growth. Yes, some things are going to change over the next years in terms of the ratio of system sales and the installed base, which means that we have to focus there very much to the service products, installed base management, what we're doing.
We think we are very much prepared to do the transition in terms of the roadmap, in terms of exploiting the commonalities, and particularly also to make our operations as efficient as possible. Thank you. I'll pass on the word to Roger. Roger?
Thank you, Ron. Good afternoon, everyone. Let me be straight with you. I'm a little disappointed. I'm a little disappointed, and why? I was supposed to read a nice little story for you. A nice little story. Actually, the story that you all typically have been waiting for. You hear all these stories about the market, about technology, about the different businesses, et cetera. The one thing you're all waiting for is, give me the numbers. What are the numbers all about? That's what I was supposed to be telling you, and that's the story I was going to read to you. What did you do? You straightaway went to the last page of my book and you read it, and you actually wrote about it. I'm talking about the press release, I mean.
At least you could have had the decency not to do it and just wait until I'm done with my story and then go to the press release. I know it's new regulations. We have to put out press releases, you got to bear with me. I'm going to tell you things that, to a large extent, you've already seen. It's a hell of a story, therefore, I think I'm still going to share the story with you and add a little bit of color and context to it. Headlines. What I want to share with you. First off, I want to share with you a little bit of our past performance. How have we been doing in the past couple of years, and why are we where we are today, and why are we as successful as we are today? Number one.
Number two, what are we looking at? In terms of growth path, what are we looking at and what are the plans that we have ahead of it, and what is actually underpinning the numbers and the ranges that you've seen earlier today? Third, what does that mean in terms of financial opportunity? Fourth, what does that mean in terms of our commitment to you and the way we continue to deliver shareholder value? Those are the things I would like to share with you in this presentation. Shareholder value creation. This is what we've been doing, and this is at the heart, I think, of what we've been doing in the past couple of years. It's a combination of really investing into our position as the technology leader in this space.
By investments in CapEx, which are very visible here, by investing in R&D, and by investing in strategic M&A. As far as the last one is concerned, because I think in terms of CapEx and R&D, I think the story is very well known and has actually been demonstrated quite clearly, I think, in some of the previous presentations. In terms of M&A, I think we need to recognize that focus is the name of the game here. The investments that have been made into M&A have been really focused. I think it resonated with a number of you when you look at some of the presentations, where you see the computational knowledge that we obtained from Brion, the stage technology that we have at ASML, and the E-beam technology that we bought through HMI.
How all of that really works together and really creates unique opportunities that Jim, for instance, talked about. Cymer, the criticality of obtaining Cymer in order to get EUV to where we are today. Obviously, ZEISS as probably the most strategic player and the most strategic supplier that we have in the entire supply chain. Very focused, very strategic acquisitions is what we've done. I think it's paid off for us. I think in terms of what those investments have done, I think it's very clear that they have been really good for us and that they pay off. This is what we see, and again, some of this has already been mentioned. All in all, we're looking at a systems revenue CAGR of 10% since 2010.
Even more so on the installed base management, where we have enjoyed a 20% CAGR since 2010, which obviously includes the installed base management that we do for deep UV, for EUV, but definitely also on the holistic lithography side. Our gross margin trends clearly reflects the strength that we have, both in the applications business, in deep UV, the workhorse that was being made reference to. The workhorse pays dividends for us in a very significant way. Also the uptick that we see from our journey on EUV, which really reflects, I think, the increased confidence and our increased ability to drive EUV in the company. I'll come back to that in a moment. It's paid off for us as a company. It's paid off for you. It's paid off for our investors in a massive way.
If you look at our track record in the past eight years, if you look at the total shareholder return as an index, take the CAGR on that, you're looking at a CAGR of 22%, which frankly I think is very, very impressive by all means and by any standards. If you compare that to any of the other metrics that we have here, I think there is a very clear outperformance of those metrics, which I think is a great tribute to the way this company has been run. Even though we have a little bit of a decline here, which is not unique to ASML, as we all know, but obviously is very clearly related to what we see in the entire semi industry.
In spite of that decline in the past couple of weeks/months, still a very significant uptick of our TSR index. Continuing growth, because we've looked at the growth in the past, but I think one of the key takeaways from what we had in the previous presentations is that growth is not going to stop, but in fact, growth will continue at quite a significant pace. I'm not going to spend too much time on this slide because this slide you actually saw in the presentation from Peter as well. It does tell you the model that we apply, what is the model that we go through in order to come to the projections that we have in our financial model. This is where it all starts. It all starts at the end markets.
It all starts with expectations about the growth in the end markets, to a large extent based on research by outside providers such as Gartner. That's the basis. There is a translation of that into wafer starts per month, what does that translate into? Then you quickly get to the numbers that you see here and that Peter actually already took you through. That's important because that talks about capacity, but we have to recognize that for us, it's not just capacity, it's also about the node transition. Those are the two drivers of the litho demand. I think in that regard, this slide is very important as well, because what this slide tells you, for a typical fab, be it in logic with 45K wafer starts per month or DRAM 100K wafer starts per month.
For a typical fab, what are the expectations in terms of the lithography spans per kilo wafer start per month? What is the expectation there? I think we go back to the presentation that Peter gave, which gave you the underpinning for the numbers that we see here. The underpinning is twofold. On the one hand, it is the increase of litho spend as a percentage of total CapEx, and the other one is that node on node, you actually get less from technology transformation. That all in all gives you the numbers that we have here. That then gets translated into an overall expectation in terms of numbers of systems. This is a key thing in between, because this really gives you four the different nodes. This gives you how the composition is in terms of the lithography technology.
What gets done on High-NA, what gets done on Low-NA EUV, what gets done on immersion, what gets done on dry. That's the way to look at it, and this is a key translation that we need in order to come up with the numbers. One thing to also recognize, this little uptick that you see here, which seems like a bit of an anomaly. This goes back to a comment that Peter made in his presentation, and this is the potential for cross points, where you could actually see also in NAND, you could actually see this uptick. An uptick, by the way, that we've not modeled in our model because the timing of that could be beyond 2025. What does that lead us to in terms of our 2020 model?
In order to do that, I'm just going to very quickly run through the key assumptions that we have in our 2020 model. You're going to get all of this later on, obviously, and the thing to watch out for is the bold lettering. Anything that is bold lettered has changed. We get a change here. This used to be 80. This used to be 50, and I think that is very much reflective of the position that we find ourselves in today. In terms of logic, I think that the key change there is on the EUV insertion, and this is now very much in line with the roadmap that the staff has been talking about.
What we're now talking about at the low insertion level, five to seven layers for small test nodes, like the 7+ might come to mind, and high EUV insertion of 10 to 14 layers where we get to larger, high volume manufacturing. That's what we're looking at, and those are the assumptions behind the model on logic and NPU. In terms of performance memory, again, the EUV insertion date has changed, and bit growth has actually been reduced. Bit growth used to be in our 2016 model, 20 and 30. That's reduced a little bit in comparison to what we have here. Then on NAND, a couple of things to recognize. Again here, a slight decrease in bit growth. This used to be 40, this used to be 50. Again, this all comes from what we saw previously on the previous slide.
Important to recognize, we're looking at stack of stacks, and for every stack there is a little component in there. That's why, also in 3D NAND, litho remains relevant. EUV and storage class memory after 2025, and this is what I talked about, the opportunity that might exist on cross points. It's not modeled for the 2020 numbers. It's actually even not modeled for 2025, but there is upwards potential from that technology, which again, is not recognized in these numbers. These are the key assumptions, then if you look at how this translates into the different scenarios. What we've done here is really take the scenarios that you are familiar with. These are the scenarios that were presented to you in 2014 and 2016, and this is what it tells you. This one, it ain't gonna happen.
Highly unlikely that we're gonna end up in this scenario. Why do I say that? This is just based on everything we've just been going through. This would be inconsistent with everything we've just heard. This would be inconsistent with what we see in the end markets. This is inconsistent with what we hear from our customers. It's inconsistent what I think you hear from our customers. It's inconsistent with what we see our customers build, and it's inconsistent with the orders that we're getting. I think this is a unlikely scenario. This is a unlikely scenario. Low insertion. Give me a break. After the breakthroughs that we just had on EUV and that Christophe talked about, this is no longer a realistic scenario. I think, to me, that's the huge progress that this company has made in the past two years.
The level of confidence and the ability to deliver on EUV has risen massively, and I think that was pretty clear and evident from the presentation that Christophe gave. From that vantage point, we think that these two scenarios are actually unlikely. We're happy to provide them to you. Do with it what you want to do with them. From our vantage point, based on all the data points that we have, we think these are unlikely scenarios. If you look at this one, if you look at this scenario, this is the scenario that gets you to approximately EUR 13 billion in 2020 with 33 EUV systems. You might say, "Wait a minute. Don't I have this 40 number somewhere on the back of my head?" That's right. We've always said that we have capacity to build for 40 systems in 2020.
With the very significant uptick in the capacity and actually in the productivity that Christophe showed, moving from 125 to 170, which is a 35%-36% uptick, we believe that 33 systems cater for the demand that exists in 2020. We have the capability of 40. That capacity is there. We think based on what we see today, we think in this moderate market scenario, we think that 33 EUV systems will do it. EUR 3.7 billion recognized for installed base management, which is a significant number, and there's a number of things that have been driving this. One element that has been driving this goes back to some of the comments that Jim made on HMI and all the things that we're doing there, because part of that is reflected in here.
Also, as you could see in the presentation from Christophe, there are quite some updates and upgrades which are scheduled starting in 2020 and going into 2021 as well. That is why this is a higher number than the number that we've seen in the past. Actually, I think this gets you to about 28% of total revenue coming from installed base management. More on that to come. That's what we call the moderate scenario. There might be more in the pipeline, and if we continue to see some of the developments that I think we've enjoyed in the past couple of years, a high-demand scenario could lead to the number that we see there of EUR 14.7 million. This for us is like a base scenario to look at this stage. Fast-forward to the next chapter in our book, which is our assumptions for 2025.
Again, quickly taking you through some of the main assumptions that we have in the model. Starting with logic and NPU. We would expect EUV High-NA, high volume to start in 2024. This actually is unchanged, so this expectation of node-on-node reduction of either 0% in a high scenario, -10% in a moderate scenario, -20% in a low scenario, that's unchanged from what we had so far. Actually, at this stage, by 2025, we're looking at 20-30 EUV exposures, and we would look at first EUV High-NA node of five-10 exposures. Five, again, in the low scenario, low insertion scenario, and 10 in the high insertion scenario for High-NA. If we look at performance memory, and again, by the way, market share assumption's similar to what we had for 2020. If we look at performance memory, EUV High-NA model is an upside.
It's not in the model, but it could be to the extent that we're already able to demonstrate what Christophe was talking about, which is that from a cost play perspective, it would make sense to have a number of layers already there. That would be an uptick which is not recognized in the current model. Big growth, going down a bit, which I think is consistent with what we've seen in the studies from Gartner that I just showed you. We would expect that 80%-90% of wafer capacity actually in the move from one node to the other actually goes to the more advanced technology, and therefore, we would assume on that one to five exposures of EUV. We just saw the numbers in terms of what that means, what one exposure of EUV, what that means in terms of number of EUV machines.
20 is the number that we saw. In terms of storage memory, so NAND, as I mentioned, again, 3D NAND stack of stacks. EUV usage in storage would again be related to crosspoints if that were to happen. That would be an uptick from what we have here because we did not model that opportunity here. Big growth, again, a little bit down from what we saw in the 2020 model. Again, if we then translate that into numbers, what are we looking at here? Starting at the lower end of EUR 15 billion, and all the way to over here, so low demand, high demand EUR 24.3 billion, and here the moderate. EUR 15 billion, some might say that's a little disappointing, right?
If you come from where you were, or where you expect to be, by 2020, then actually EUR 15 billion is a little disappointing, I would agree with that. Just remember what needs to be true for this to happen, right? That means that consistently we're looking at, for instance, -20% in terms of a node-on-node transition in logic and all the other assumptions that we had in there. Quite a bleak scenario one might argue. If that were to kick in, then this is what you're looking at, ending at EUR 15 billion. This is the moderate market scenario, and a few things to take away from the moderate scenario. First off, the sensitivity to High-NA is actually fairly low, right? If you compare the high insertion, and high insertion again should be read here as high High-NA insertion.
We couldn't put that on a slide, high High-NA insertion, because you would think it's a typo, but that's what we mean. High High-NA insertion versus low High-NA insertion. You still with me? The difference there is fairly modest. From that vantage point, I think the sensitivity to the financial model in terms of the High-NA introduction, at least for 2025, is fairly moderate. It will be significant on a go-forward basis. For 2025, it's fairly moderate. That's one thing to recognize. The second thing to recognize is that there is an obvious shift from dominated by deep UV into dominated by EUV. The workhorse that has been made reference to is still going quite nicely. We're still having 40 systems of immersion in this model, that's still a pretty significant number and a pretty significant contribution to our financials.
The third comment to make on the moderate market is the installed base, which at this point in time would be 30% of our total revenue. It's not just going up in terms of absolute numbers, it's also a very significant number percentage-wise, which I think is a good annuity for ASML to have. Is this all? Depends on your crystal ball. This is something that Peter made reference to, it depends on your crystal ball. We don't know what your crystal ball signals you. If your crystal ball is sparking with opportunities and gives you some of the high demand expectations that we listed, if those conditions are met, then actually you're looking at an even much brighter situation where we could end up with EUR 24 billion of revenues. These are the different scenarios that we have.
Significant spreads, which again, I would say six, seven years out is not a total surprise. Most important takeaway as far as I'm concerned from this slide, the one thing that will determine whether we are here or here is end markets. That's different. I think that's different from where we were even two years ago. I think two years ago, there were also question marks around the ability to deliver, the pace at which we were able to deliver, et cetera. I think we're beyond that point, and I think very clearly what we're looking at right now is the end markets are driving, in which scenario we ultimately find ourselves in. What does that mean in terms of our total financial model? There's a number here. This is the model of 2017.
This is the guidance that we gave you on the back of our Q3 numbers. This is the financial model that we gave you in our 2016 Capital Markets Day. This is the 2020 scenario, and this is done based on the moderate market scenario. This is the EUR 12.913 billion that we have in there. Gross margin, north of 50%. R&D as a percentage of sales, 14%. This is something that we referenced also on the Q3 call. We do see a bit of an uptick in R&D sales. We said that it's moving from 13% to 14% because of the pull-in of the development of the 3400C machine and also the acceleration of High-NA. That's reflected in here. We would assume that during 2020 is going to level off again and then stabilize into 13% on a go-forward basis.
We're looking at SG&A of 4%, CapEx of 4%. We would drive the cash conversion cycle below 200 days and still have an effective tax rate of 14%. That's the model that in essence we think you need to look at. For 2025, again, here we have the scenarios. Again, make your crystal ball go into gear. Gross margin, definitely higher than what we're projecting here, but to a large extent will be dependent on which scenario we find ourselves in. I think as we all will appreciate, the level of growth margin to a very large extent correlates also with volume and fixed cost coverage that we have there, learning cycles that we continue to deploy, et cetera. R&D, as I mentioned, will be nicely back at 13%. SG&A 4%, CapEx would at that stage be 3%, and these would remain unchanged.
It's very clear that there is a wide spread, right? From 15% to 24% is a pretty wide spread. From that vantage point, we believe flexibility, which has been one of the key cornerstones of this company for many, many years, remains an important thing to do. Just to remind you of some of the flexibilities that we have in our operating model. We have some flexibility in our workforce of 14%. We have 33% of our R&D actually outsourced. This is pretty significant. 82% of our cost of goods is in materials, 18% is in labor. I think that also tells you. Has historically been the case for ASML. That, I think, is one of the key elements of flexibility that we have in our operating model, and that remains very critical for us to sustain that.
Finally, pretty clear based on everything I've shown. I think based on everything you've heard in the past couple of hours. It's pretty clear that we believe a lot of cash will be generated by the company in the next couple of years. As you've seen in the model, we continue to invest in R&D, we continue to invest in CapEx because we believe, as Martin always says, we haven't run out of good ideas. We still have many really good ideas that at the end of the day will be accretive to the value to our customers, will be accretive to our shareholders' value. From that vantage point, we will continue to invest in those areas. Strategic M&A, as I mentioned to you, to us, it really needs to be strategic.
If you ask me what is the number of M&A opportunities out there that is both strategic and realistically achievable, that's a really, really, really, really, really short list. Short to the point of maybe being nonexistent. It's a very short list. From that vantage point, we do not anticipate significant M&A deals at this stage. What are we going to do with the cash while maintaining a flexible balance sheet? Because again, that is something that flexibility is very critical in our business model and also in our financial model. With the flexibility that we currently enjoy on the balance sheet, we believe a lot of cash will be generated, and that will be available to our shareholders.
The way we've approached this historically, as ASML, I think, is to have a combination of growing dividends, stable or growing dividends, and returning cash through share buybacks to our shareholders. That's what we will continue to do. You will see increase in our dividends, and you will see a very disciplined way of execution over share buybacks, because I think that's really important for us to recognize. ASML has a tradition of, in a very diligent and disciplined way, executing on a share buybacks. It's not opportunistic. It's well thought through, and it's executed in a very disciplined way. We expect to continue to do that. Is that for eternity? Of course not. We will review where we are on the maturity curve as a company.
Once in a while, we will review whether the distribution between dividends and share buyback, whether that's still the right way to go. There are many views on that in this room. We have 150 seats, maybe two or three not filled. Let's say we probably have 147 perspectives on that matter, and we're open to listening to that. Be assured that we continue to listen to you, and that we continue to look at where we are on the maturity curve and what that means in terms of the distribution over share buyback versus dividends. Friends, that is it. I hope that in spite of the fact that you already went to the last page, you still enjoyed the nice little story.
I think it's a hell of a story that this company has written in the past couple of years. More importantly, will continue to write in the foreseeable future. I think it's a story of confidence. I think it's a story of opportunity. I think it's a lot of massive learnings that have led us to where we are today, and I think it's a story of a company that will continue to create enormous value for its customers and for its shareholders. Thank you very much. With that, handing it back to Peter.
Thank you. Yes, what can you say? This is a summary of what we tried to convey. We do believe, and I say it again, that innovation is what drives this company. We just bombarded you, perhaps that's the right word, with a lot of technical explanation on how we're going to create value for our customers. I hope it's clear for you that that is a result of relentless focus on innovation. We think when we do that together with our customers, with our key customers, we act as one team, we drive that innovation forward, which means that it's going to be very healthy growth profile for this industry. I think this will drive many of the applications that we talked about.
A shrink, as Martin said, is still a key driver for Moore's Law, but it's more than that. Martin talked about device architecture, about all the other things. It's a key element. It's a cornerstone of what our customers are doing to drive innovation forward. I think I showed you that the shrink that we're planning, the innovation that we are planning is affordable. It is affordable in terms of percentage CapEx. It's affordable in terms of the cost per function. It's a combination going to be of the three product lines that we're having. It's applications, basically tying it all together. EUV, where we crossed the hurdle of high-volume manufacturing and deep UV still being a workhorse in the industry. Even if you look at Roger's slides, 200 units, even in a moderate market, close to 200 units is quite a significant number.
If you take that together, look at the applications group as the glue that ties this together to the solution that our customers need, it's clear that we have a very good roadmap. This all together will enable Moore's Law. Again, we're a key cornerstone of this. Now, what does that mean financially? We updated the 2020 model. The people that may remember the high-market scenario in 2016 was around EUR 13 billion. That's now our moderate market scenario. It also means that we have a high-market scenario that is above what we showed in 2016 for the reasons that we just mentioned. We look forward.
Yes, there's a big range, like Roger said, EUR 15 billion means -20 node on node in wafer capacity, -20, -20, -20 over a seven-year period, with no growth in DRAM, very low growth in NAND, pretty bleak. That's very bleak. I think that would probably be a reflection of a very severe macroeconomic problem. Now, on the moderate market, could call this a reference scenario. We plan our own business. It's around EUR 19 billion. A high market, around EUR 24 billion. I would invite you to also look at some of the assumptions that we have in the high and the low market. For instance, high-market scenario, DRAM, high market is 20% bit growth. High market in 3D NAND is 35%. We have to think about this range of opportunities. Like Roger said, we don't have a crystal ball.
We just want to provide you with scenarios so that you can start looking at this from your own perspective, this is what we invite you to do. You also might have seen that we don't provide you with an EPS because we don't know what the share count is going to be. Share count is a function of the share price. We had a big debate in the company. Skip and his colleagues said, "We have to give them an EPS." I said, "Well, we have to give them a share price because that's what is determining the share count." I said, "Wait a minute, the share price is their job, not ours." You'll figure it out. When we give you these numbers, you can figure it out.
When we've done that, I think when we're done and we're in 2025, when we look back I will look back what we have done from an innovation point of view, from a customer value point of view, and from a shareholder value point of view. I think we will have created a lot of value for all of those stakeholders, including our people and our partners. A lot of that value, that cash value, given what Roger said on our model, will be returned back to the shareholders, in a distribution ratio that by that time we will have determined in close connection with you and in communication with you. With that, I would like to close this summary, and I think, Skip, it's Q&A time. Thank you very much.
We'd like to bring the presenters up here. We're going to bring the chairs and open the Q&A panel session here. As they're bringing down the chairs and getting things set up, just go through the process here. Please raise your hand to be called for the question. Name your company, obviously, and identify yourself. Please limit your question to one, so we get a chance to go around. Again, we can always go around again if we get others.
A short follow-up, like in a conference call.
Yeah. We have a microphone somewhere here. I don't see it yet, but I'll pass this one around if you don't find. Do we have one that we throw?
We'll just pass the microphone.
Yeah, okay. Thank you. Let's go ahead and start. Mehdi?
Somebody woke up with a mic there.
Yes.
You can throw. This is a box that you can throw to the next victim.
It's just talk in the round thing on top.
Are you serious?
All right. Okay. Just one question, one follow-up. Actually, first one is for Martin. You went through the end market demand drivers. I want to learn or basically think through the 5G. When you think about the changes that 5G brings, millimeter wave, and put prospect of changes to the SoC, de-partitioning of parts of SoC, how is that impacting your wafer capacity requirement for logic and foundry? If that were to de-partition, then perhaps it could have a big impact. I just want to know how you have thought through this and if that's been dialed in. A follow-up question for the team is, you guys put the 2D Crosspoint in the NAND bucket, but the way I see it could potentially become a DRAM replacement.
In that context, how do you think about the DRAM market and market leader positioning itself, especially as Cascade Lake comes out early next year, and that will be the first server DRAM that would include or incorporate Crosspoint in a DIMM format? Should I repeat?
No, just try to answer both. I think you should realize that those questions are better asked to memory makers and to chip makers than me. My view on the overall growth, you start with 5G. 5G just provides a better way of getting more volume, data exchange, and getting faster response time. That means, in particular, some of these automotive autonomous driving applications are requiring 5G to go because of the time delay. I still think 5G overall is driving over application. You talk about SoC. This SoC story is not new. It's already there for years, and I don't believe it fundamentally changed the little story because every single piece of the SoC requires little to do it.
What happens here is that it's more cost effective for customers to partition the chip and drive some architectural changes rather than only going to minimize the chip. That's why I'm saying my positioning of Moore's Law is not just this only linear shrink, but also the partitioning and SoC is part of the, in my view, the overall innovation. Your last question on memory, that's a tricky one, because I can tell you if all of my customers, I talk in detail of the stuff. Some of them talk, some of them doesn't. Let me refer to the only one who has been very public on it, Micron. Scott DeBoer have mentioned now for the second year in the last analyst conference that he look is for a DRAM alternative, and Crosspoint is two different application in the total memory space.
None of the other memory makers has confirmed that being the case. What's true for both memory types is architecture on the software side to deal with this, which is different if a Crosspoint for Intel controls the shelves versus the Micron position, new memory, where things are now existing. You're right, but I didn't argue with the investor team to make these three buckets because we talk about performance memory and storage memory, and some of them will also be indeed this I talked about the success of DRAM. Which could be the Micron device. I think all of those innovations will strongly depend on how the food chain is able to adapt to software and architectures, which can unleash the capability of those devices. That, to date, is determining the volume market drive of those new devices.
This may be a pretty fluffy answer, but this is how far I see it.
All right. That's it.
Mehdi, have to.
Any other ones over here?
Oh, all right. I was going to take one, Skip. Can I have it?
Okay, go ahead, Krish. Sorry.
All right. Hey, Krish Sankar from Cowen. Two quick questions, one for Roger. Clearly, you highlighted that the EPS is a function of share count, i.e., stock price. It looks like also the gross margin plays a pretty big factor. Can you give more color on how to think about gross margin? Should we assume that the holistic lithography business should be kind of like how process control gross margin should be? EUV similar to DUV in the high 50%-60%? Any color on that would be helpful. Just as a follow-up, the mix of DUV becoming 50/50 units versus install base makes a ton of sense. DUV units have to decline as EUV gets more adopted.
Is it fair to assume that the DUV revenues that you're seeing today, the assumption is going to be flat with unit sales being offset by growth in install base? Should the overall revenue units plus install base actually decline as is today? Thank you.
On both. Let's start with the gross margin. As we put it into the model, we said it's going to be over 50% by 2020, and we think it's going to be over that by 2025. I can give a lot of color, but the reality is it's very contingent upon a number of conditions. First off, what's the volume going to be? Volume, to a very large extent, drives gross margin, as you know. I think we have a lot of plans in place to further drive gross margin. I think the company is very strong on looking at ways to reduce cycle time, to reduce cost. It was very evident, I think from the presentations of both Christophe and Ron, that that's embarked on.
It's very clear, particularly if you look at the EUV story, the strong correlation that we have between the ASP and the performance of the machine. It's ver easy to see how that ultimately is a major contributor to gross margin. We're very confident, but in terms of giving you a number, there are so many factors that play into that we believe at this stage, 2018 looking at 2025, we think you're well-served with our ambition and perspective that it will be a lot higher than what we have by 2020. In terms of deep UV revenue, I think you can sort of do the math based on the numbers, because we do give you the numbers for the deep UV business. I think all in all, by 2025, it probably will be a small decline in terms of the number, if you add it all up.
The huge uptick that we enjoy from installed base revenue will make sure that deep UV business will continue to be a very significant contributor both to our top level and the gross margin.
Skip, can I ask a question or do I get to pass it?
Yeah, go ahead pass it then.
Get this out to somebody in the middle.
Krish, you come from this side. We have one question, we come down here.
Okay. C.J. Muse, Evercore ISI. I guess a follow-up quick one on gross margins and then a bigger picture one. For gross margins, non-tool, I believe you're running around 48%, including upgrades, et cetera. How should we think about the trajectory there as that business grows at that 15%-20% CAGR? Then, I guess a bigger picture question on your 2020 target model. You kind of crushed everything, I'd say, with the exception of the stock buyback. Obviously, the share price 50% higher played a role there. Also, your working capital used roughly 25% of your operating cash flow if you were to exclude working capital notionally. Is working capital today where you think it needs to be to support the level of business that you see?
As a result of that, should we think about a larger buyback in terms of capital return in the prospected 5+ years? Thanks.
Let's start with the latter question on working capital. I mentioned that we think there is still potential in the reduction of cycle time of the current portfolio of products. That should lead to a reduction there, and therefore, less working capital being tied up. On the flip side, company is growing, and it's growing significantly. That's like a counterpoint. Then obviously, we're also ramping up for High-NA. There is a number of different dynamics, which over the course of the next seven years will play out differently. Therefore, we said our ambition is to continue to drive it below the 200 that we've put in as the target for 2020. That's the guidance I can give at this stage. In terms of gross margin for service, we don't guide that, we don't disclose that specifically, the gross margin on the service business.
I can give you a few of the key drivers there, because I think you kind of get the picture as to what would drive it. There's a number of elements here. First off, as I think, again, Christophe mentioned on EUV, what will be critical is to drive down the cost of the service of the machines, because it's a value-based model for EUV. It's an output-driven model where, again, as we saw, the service revenue is dependent on output, away for output. Therefore, it is in our control to a certain extent to make sure that the service costs actually get contained. A lot of the things that Christophe and his team are currently doing, and will actually already appear on the 3400C machine, is a significant improvement of the serviceability of the machine, which cuts both ways.
It would drive down the cost for us. It would also be very beneficial to the customer because it would reduce the downtime. You also saw in the presentation by Ron that there is a whole portfolio of new services upgrades being developed on the deep UV business, which makes a lot of sense given the real significant size of the installed base that we have there, and again, that will continue. Also there you saw that there will be a value-based component in there. Again, to the extent that we're able to replicate the model that we're driving at EUV, I think all of that will ultimately lead to a significant improvement in the gross margin for the installed base revenue.
Can you get that to Sandeep?
Hey, you want a catch?
Hi. Thanks. Wow. Thank you. Sandeep Deshpande, JP Morgan. Peter, I just have one question. You've talked about previously that you understand lithography, but you don't necessarily understand the rest of the semi cap business. Based on you-
Hands free would be good.
Okay. Revenue in lithography increasing so significantly through 2025, lithography as a percentage of semi cap ex will increase quite significantly as that happens. Is that your view that the overall CapEx is itself going to go up very significantly and CapEx to sales in the industry is going to change? Secondly, regarding your ASPs, I just want to touch base, and you've talked about a very rapid movement in your throughput of your machines over the next two, three years even. 18 months, I think that was the comment. How should we be looking at your ASPs moving? Simply because, you've talked in the past that 50%, you can give throughput increase to your customers. How should we be looking at the ASP increases? Not necessarily only over the next 18 months, but through 2025, et cetera. Thank you.
Okay. Yeah. Thanks, Sandeep. Is it working? First of all-
Is it working?
Yeah. First of all, I think that when the data that I showed in 2010 to 2017, we saw a specific period in which, because of the introduction of multiple patterning and the introduction of 3D NAND, we saw a specific time period in which there was almost for the 3D NAND makers, but also for the equipment makers, kind of a double whammy. You had the transition of 2D to 3D, and you had the greenfield fab. You see this is a period where you had almost an extraordinary step up in CapEx. I think, a part of that step up, litho did not really play because in the 2D to 3D conversion, they used the same litho tools, so there was no additional equipment needed.
I think when you look at now, also you saw customers going to multiple patterning, which of course, if you have multiple passes through the system, we benefit, but also other process steps, equipment suppliers benefit. I think if you look going forward, then in terms of value of the leading-edge litho, we will take a big step up because of EUV, but it's going to be one step patterning, which will follow by fewer steps for other process equipment mix, which makes the whole thing more efficient. I think this is where we were going. You actually saw that in single patterning before 2010, the litho part was significantly higher, and then it dropped relatively.
Our top-line grew, it was a relative lower percentage of the WFE, which, by the way, with the introduction of EUV, with the step up in litho, and then by eliminating some of those additional process steps, litho will take a bigger part. I think that's clear. I think also we believe if we do the math and we look forward on the semiconductor's top-line growth. By the way, we gave you the number on the previous slides, what the litho intensity is, as a percentage of WFE. If you look at total sales, we will go back to about 2.3%, so we will get a bigger part. The total WFE CapEx, I think will be lower. It has to do with fewer players. I think, clearly, WFE has benefited a lot from the consolidation in the industry.
I can just only go back to 2006, when we had more than 10, I think something like 13 purchasing organizations in DRAM. They were all trying to get to 15%-20% market share. Of course, you get inefficiency, and you get these big cycles. Fewer players lead to more capital efficiency in the industry. Yeah? That, I think overall, the WFE as a percentage of sales might go down. The part of litho will grow. The numbers we showed you, that's our assumption, but it makes sense because of the introduction of EUV. On ASP, we have a habit of sharing benefits with customers. And yes, Roger said it, the value of the tool scales with the throughput. Yeah?
The throughput, if the customer gives them higher opportunity to leverage their fixed cost in their fab, that's a big value, and we used to share it. I think at this moment in time, we're having discussions with customers, but I think this 50/50 that you're referring to used to be the past, but look where we are. With EUV, if you look at the operating income in EUV 2018, and you subtracted the R&D, we're still at a loss. We've made significant investments over the last 10, 15 years. When you look at the size of our company, some have argued that it was almost irresponsible. We need to get a return on those. In the discussion we're currently having, I think also we need to reflect on this, on what a fair sharing at this moment in time is for the EUV tools.
Yeah? I think 50/50 used to be the past, I think there's also some room for some firmer negotiations.
Who is it?
Thanks. Steven Mahone from UBS. Two questions, changing tack a little bit. Firstly, you've talked a little bit about the progress on E-beam and getting into confidence in getting towards production usage. Can you just give us an update on where we are? There was tools shipped out as testing tools to customers not too long ago. What's the progress been, and how do you feel, I guess, relative to the prior 2020 target to see EUR 1 billion of revenue from HMI?
The question was about E-beam. I assume it's about multi-beam since HMI is in the market with single beam. We plan to ship prototype multi-beam tools to the market. Next year will be our first deliveries, and then we'll start to see more significant volumes in 2020 and beyond. Second question was on-
Can you still hit the EUR 1 billion target that you had in mind?
Yes. We're still on track for that. That commitment that was made in 2016, we're still on track for that extra EUR 1 billion.
I tried to squeeze this as one question. Just one quick follow-up is, we've talked a lot about availability, and we've talked a lot about the throughput of the tools, but one of the issues that customers have flagged for a while was the predictability of downtime on the tools. Is that fully resolved now? It sounds like it is, but I'd just like to get your take on how customers look at that today.
Well, if you look at EUV, I think that the predictability is a good question. I showed you an uptime number today, which is about 80%-85%, and about half of this today is predictable. The amount of scheduled downtime we have on EUV is much higher today, at least, than it is on deep UV. this part, I would say customer usually can deal with. The rest, which is another, let's say 10%, that's the part we have to reduce. I think this was mentioned by Roger, in fact, one of the things we are doing on the current platform is to improve the serviceability of the tool dramatically, so that in case of an event, of a downtime, which those machine happen once a while, the time we spend to repair is a lot shorter.
We are improving the system so that this predictability that you mentioned, and indeed you're right, customer wants to have this predictability. We want also to provide them that at least with the 3400 C, so sometime next year.
You have to turn around, Dave.
That's a long way away.
You've got a big hand, so I'm sure you'll have it all. It's tolerable.
Thank you. It's Adi Metuku from Bank of America. Two questions, if I could. Firstly, as you look out to the next seven years, obviously you talked about consolidation and that increasing efficiency. We've recently seen GlobalFoundries drop out of the race, but we're seeing more Chinese players coming in. Could you provide your thoughts on how you see your customer base developing? Do you expect to see more consolidation? I have a follow-up.
I think that's a good and very current question. It is also clear that the geopolitical tensions are rising. Yes, we see an opportunity. We actually showed, Ron did show the increase in sales in China. The Chinese semiconductor industry is clearly stepping up. It's quite a significant growth pattern. It's not so much that there's so much capacity put in place. It's really the number of initiatives are very large, which all have relatively small wafer capacity installations because they're just new. They're greenfield fabs, not only greenfield fab, greenfield companies. Yeah? They're just qualifying processes that are lagging in their respective segment. They have to get started. This is why the market is quite significantly growing. It's the number of initiatives that is actually driving the top line.
Not so much the individual fab sizes and the speed of ramping that fab up. Which also begs the question, how many of those initiatives are going to be successful? If you ramp your first 10K waves because you need to qualify a product to a local customer, will that product work? Will it have the economics? Actually, people also in China, when I talk to customers, they look at the economics. It all has to work. It all has to fit. Some of those initiatives might be later or might fail, and some might be successful. It is a bit premature to say what will it do to capital efficiency in the industry and how many new players will step up.
When you look, for instance, at the Chinese landscape, yes, we have two existing foundry players, which is Huali and SMIC, and you have three new memory players, two DRAM and one 3D NAND. The latter three are really at their initial stages. That question mark remains to be seen how quickly they will ramp, and whether they will be able to disturb the supply-demand balance. Under the assumption everything is successful and they execute on their ramp-up plans, which is not only the current fab, but also the new fabs, then in a period of seven to 10 years, there's going to be a significant number of wafer starts added to the industry.
You could add it's also needed, that will create to, as personal view, will create to some more capital inefficiency, because that's quite significant, if you look at what they're talking about. Also it is in sync with the statements of the Chinese government to say we need the level of self-sufficiency in semiconductors of quite a high percentage. It cannot be anything else but impacting the supply and demand balance and the capital efficiency. Like I said, many of them are just at the starting point, whether they can be successful, either by themselves or through, let's say, certain measures that on the geopolitical front are being executed as we speak, that could also hamper some of those developments. A little bit early.
Okay. Do you think any of the existing players will drop any of the future nodes, or do you think they're all pretty confident that they'll carry on with these nodes going forward? My follow-up was-
Yeah
Sorry to sneak one in, Skip. My follow-up was for Roger, on the gross cash balance. Previously you said anything over EUR 2.5 billion in gross cash will be returned back to shareholders. Do you have any thoughts around that? Thank you.
I'll answer that first one. I think the existing players, except the ones that have publicly said they're not going to go there, they're all going fast. If you would ask those players, do you see there is a potential risk of new entrants? They would say yes. Yeah? If you ask the customer what are you going to do about it? The answer is very clear, and it's consistent for all of the existing players, is we're going to out-innovate them. We'll go faster.
EUR 2.5 billion is still the number that we're looking at. Of course, you cannot measure that at one point in time, because obviously you need to look at that in the grand scheme of what you expect working capital to develop and cash to develop in the period thereafter. Roughly speaking and over a longer period of time, that's still the number that we're looking at.
Thank you.
It's Peter Olofsen of Kepler Cheuvreux . I think it was in Martin's presentation, there was this slide on the industry readiness for EUV insertion at 7 nm, 5 nm, and 3 nm, where you showed some green and some blue blocks. You basically said, well, there's no showstoppers as we see it. Could you maybe shed some light on two potential issues, stochastics and 3D mask effects when we go to 3 nm? What's your confidence level that resists will be good enough for 3 nm? Or might your customers need some workarounds, like post-processing steps? On the masks, will your customers need to develop new masks when they go down to 3 nm?
Well, it was not my slide. It was Christophe's slide. It's a bit of a. I'll take a few steps. If Christophe like, please do so. I do feel that in wavelength transitions, as we have seen the last 30 years, this is not the first wavelength transition we see. They go from i-line to 248, 248 to 193, 193 to immersion. The pattern is always the same, is that the machine needs to be first before real volume and infrastructure and mask and resist is happening. That is in first aspect you need to realize the dynamics of wavelength transition. Customers shared with us that the current status of mask resist is good enough committing them to 7 nm and to 5 nm . For 3 nm, I think we don't have many specific decisions. It's first having this machine out there.
For today, as Christophe shown, N for 5 nm, we don't need innovations. I think the infrastructure is more or less developed, and we just have to mature it. Some of the mask shop may still make some more buy on equipment. Our pellicle program is also progressing. Long term, I think where there is a challenge, a little over long term, 3 nm and beyond, is that the line edge roughness could become a challenge. There are multiple measures for that, including improvements on masks. Those will not be dramatic improvements. We talk about a potential optimization of the layer stack. We talk about resist improvement by resist suppliers, which by then, their revenues is sufficiently to also drive this through.
From a lithography point of view, we could still increase dose, which slows down the machine. That puts future challenges for opportunities for us also to drive the productivity back up. I don't think we will have a showstopper at 3 nm on infrastructure, although it's true that today we still have to do some work to make it work.
Okay. Maybe follow up for Roger on the gross margin outlook for 2025. I understand that because you're funding part of the R&D and CapEx of Carl Zeiss, that you will get the discounts on the optics for High-NA. How would it affect your gross margin by 2025 and beyond?
That's right. It will have a positive impact, obviously. We have to recognize, as you saw, it's starting in 2024. The number of High-NA machines in 2024, 2025 is still limited. Beyond that, it definitely will have a good impact.
It's too early to quantify?
Too early to quantify in the grand scheme of things. Also given the very directional guidance that we've given on gross margin for 2025.
To be specific, we agreed with ZEISS to have an equal IRR on the business plan of High-NA. It has also a function of how much money are we going to put in there between now and then. That means, what is an equal IRR? How much will they put in? How much will we put in? Which will drive the absolute number, and that will drive the discount. It's a bit difficult to say, because it's a function of what we put in there and what the IRR is. That's why it's not possible. You can intellectually understand that it's going to have an impact on the gross margin, which is a positive one. Yeah.
Jérôme Ramel, Exane BNP Paribas. First question, Peter. Both wafer start for logic, moving from 0.5 million to 1.6 million. Behind how much is unit and how much is die size growth? Maybe there's no die size growth in your assumption, but just to understand. Second question, just to make sure I understood correctly the conversation I had with Martin and Christophe. For the sake of modeling, moving forward for the next node, i f I look at the EUV dose exposure of 20 millijoule per square centimeter and 30 for DRAM, should I keep that number fixed or will it increase in the coming nodes? Thank you.
I will give the answer to the last question to Christophe. On the die size, I think I can refer to what Martin said. Martin looked at SoC and basically looked at different chip sizes and die sizes that are needed for a system solution. It's difficult to say. We used to have very simple, you had a PC, and you had a CPU in there, had a certain size, and that went with the node. It's much more complex today. Generally, what you are seeing in the lead, that in certain areas, die size actually grow quite significantly. I think Jim can probably respond to that also. It's going to be the combination of the SoC of a combination of smaller and larger die that are going to determine how much wafers we actually need. That's in our model. We have a certain assumption there.
We don't have the detail here, perhaps, Jim, you have an answer to that?
Not the detail here.
Not the detail here, no. I think it's going to be a mix, yeah?
Yes. I'm just wondering how much time I should spend answering the second question. If you look at the 30 millijoule we mentioned on the slide. I think these are the assumption today for, let's say, 7 nm logic and 60 nm DRAM. This is what we see our customer driving. Now, if you look at the next node, as you shrink your pitch, in theory, the amount of dose you're going to need goes up. At the same time, I think Martin already mentioned that a major effort done by our customer, the resist supplier, to also improve the resist. You have a little bit of a parallel activity, which is also very aggressive at this point of time, because that's also an opportunity for this company to improve the resist to lower back, if you want, the dose.
I think we also talk about cost model. We talked about the number of EUV layer that we will see over time. Of course, one of the parameter to decide if a layer is going to be done with EUV or not is the dose. If you need a dose that is too high because of stochastics, for example, as we discussed, then most probably this layer will not move to EUV. You have this optimization, which I think is done by our customer, by our resist suppliers, colleagues, and also by ASML. Everyone is working together to, I would say, to make sure that the dose, which theoretically should increase because you shrink, is not going to increase too much. I think that's a very healthy dynamic we see today.
To make sure we're being consistent with the answer, I think, which I gave you in the break. The line edge roughness has many contributors, and dose is one of them, the photons. Also resist material and granularity resist is the other one. Regardless, we'll have it moving forward. We will drive the productivity to a level that the cost of EUV, regardless of dose, makes it work. At least also our customers, it's a sensitive subject because we always quote productivity, and that's only with a certain dose, and then it ends up with a process that needs a higher dose. We may not follow the requirements by the day, but we will over time drive the productivity up, which partly is shown already in the roadmap, and continue to drive up.
Long term, the doses need to be substantially different than today, which is also an opportunity for this company to provide value on the long term.
Which, by the way, I just said to you, there's nothing new. We had this in DUV also. These are the development curves that we have to go through.
Yeah, Peter, in your summary, you mentioned you wanted to work closely with customers as one team. The easiest way to do that is via a cross shareholding, and you're doing that with ZEISS. You give the example of having an IRR. Is there some frustration that with your co-investment program or partners, past partners, that they've sold their shares or at least drastically reduced their shareholding?
There's no frustration. It's only congratulating them with a good choice at the time. They made good money. No, I think at that time when we did that, you have to put it into the time perspective. At that time, they actually knew that the only way to move forward, these were the logic customers, Samsung, Intel, and TSMC. EUV was the only way forward. They actually came to us and said, "Guys, one, you need to buy Cymer. Two, you need to double your R&D." Because EUV needs to work. At that time, we were a company with not even EUR 5 billion in sales, and we had EUR 600 million of R&D and said, "You need to double your R&D." Then we said, "Listen, you can do that, but we cannot afford it because that means our shareholders will pick up the bill.
You guys need to chip in." They said, "Fine, we'll chip in. Now you need to lower the price of the tool." I said, "Well, the shareholders are still going to pay the bill, that doesn't make sense. Why don't you become a shareholder?" This is how it came. They did that, and they did that because it was not only a I don't think it was from a strategic point of view that they wanted to be a long-term shareholder in ASML. They wanted to see EUV work. Once they saw that happening and they saw our execution profile after the Cymer acquisition also, basically doing what we're doing today, they said, "We don't need to be a 3% or 5% strategic shareholder." We just get basically a hedge for the R&D money that they gave us, plus some extra.
That was just a business deal, I don't think that affected at all the strategic cooperation with the customer. On the contrary, I think in the beginning it did, because the importance of EUV to them, and to us, created this cooperative model, this cooperation model, that we're now extending without the shareholding model because there is a mutual dependency now that is so obvious. That drives the strategic cooperation and not so much the shareholding. With ZEISS, it's a bit different. We are two companies in one business. That's so much integrated. It's a little bit different. The logic is the same because when we invested in ZEISS, they actually said, "Hey, the investments that you're asking from us are too big for us to really carry.
Why don't you chip in?" Then we say, "Yeah, why don't we become a shareholder?" That relationship is much longer term. It's much more symbiotic. It's like Siamese twin. We're joined to the hip.
One last question. Quick and then we'll wrap.
Peter, just on the back of that, just in terms of you mentioned being maybe a bit more sort of robust with customers now around negotiations and in the context of them having made a good turnout of being investors in ASML, how are you seeing the response or the like to those negotiations and around how they expect what they expected you from a negotiation perspective?
I think it's all about the value share. We have to deliver. If we agree on a certain value, a certain price, then we have a liability also. We need to deliver on the productivity, and we need to deliver on uptime. We need to deliver on certain wafers per day, and we build in guarantees. I'm basically saying, we know your shipping profile. If we do not execute on time, we'll pre-ship you a machine. These are the kind of things that you can think of. There is no liability from our side. The only thing is what I said is, I think where we currently are, we need to also look at how we recuperate some of the value and the returns that we have put into this. This is where we have the discussion with customers.
It's not that we don't have any liability or any obligation towards the customer because we will "guarantee" a certain performance, and we'll put our balance sheet to work, if we don't make it, then we'll pre-ship a few tools. Which we don't expect that we will, but it's there.
All right. With that, I'd like to formally close the presentation and QA portion for those on webcast