Want me to start with the introduction?
Go ahead.
All right. Someone can grab the door. Mark, you want to grab the door? Anyways, welcome everyone. My name's Jed Dorsheimer. I'm one of the analysts here at William Blair, covering the energy and power technologies group, which includes power semiconductors. I've got some great news for all of you. 2+ developments.
One, this is the last presentation in this room, we don't have to go anywhere for the breakout. Two, you're going to learn everything that you need to know about burn-in. I have Gayn Erickson to my right, CEO of Aehr Test, and Chris Siu, also to my right, Chief Financial Officer. Aehr Test is a name that, well, it's up 20% today. Gayn, obviously you're presenting some good things here at the conference, and Google's CapEx is up.
Aehr has been evangelizing, probably is the right term, wafer-level burn-in, and with your acquisition of Incal, package-level burn-in. Largely in the compound semiconductor market, but now for artificial intelligence, and memory, and silicon photonics, and all the markets that you're going to tell us about. Before I turn the mic over to Gayn, just check our website for any important disclosures. With that, I'll turn it to Gayn to educate us on burn-in.
All right. Thank you. All right, I thought I'd just go through these slides fairly quickly, just to get everybody quickly up to speed, and then we'll have plenty of times for questions, I guess, during the initial meeting, and then because the breakout group is here, we'll just continue on as necessary. I think when we get to the breakout group, we actually cut the mics and continue on so people can ask those questions at that time as well.
Just a little bit about Aehr Test and what is burn-in. Aehr Test has been doing this for a very long time, in that we're known as a test company. Within the test space, all semiconductors are tested good from bad, how good they are, or speed binned. We're in a segment referred to as burn-in.
What burn-in is it really encompasses a reliability screening test that's done at production or during the engineering qualification of semiconductors to validate and characterize the reliability, and then in production, to screen out infant mortality or failures that otherwise would fail during its normal application. Many semiconductors, whatever comes off the line is good enough. In other cases, like military and traditionally automotive and other mission-critical applications, that reliability was not good enough.
You would do an extended life test. It would accelerate its age, and within up to 24 hours, you could actually make the device look like it's a year old. Any device that would've otherwise failed in its lifetime will actually be removed from the process. Why that becomes important, I'll talk just a little bit more in general. I guess, let me just do that here. Why now? Why?
What's the big deal? What's driving Aehr Test? What's driving our markets? Semiconductors, I think everybody's kind of here, are really booming. Right? When we started our story here, we saw this continued growth of semiconductors, but noticed a couple of key trends. One of them is that semiconductors are actually not getting more reliable. In fact, quite the opposite. Between compound semiconductors that are becoming a larger proportion of the pool,
If you will, that have higher reliability issues or infant mortality rates that can be addressed with burn-in. More devices are memory-related. All DRAM and flash memories are actually burnt in, because their actual infant mortality rate is too high for the applications. All processors are. It turns out that more and more processors are on the most advanced nodes. As Moore's Law has basically faded, devices are getting larger and larger.
Their actual likelihood of failing is higher now, right out of the chute, than they were five years ago. That trend is going in that direction. That bodes well for us. It's a rising tide. It turns out more and more semiconductors are going into applications that matter. I remember, whatever, 20 years ago, I've been doing this a long time, mid-2000s,
The whole market in tests was driven by consumer electronics. Guess what? Nobody cared. Okay? The reality is Nokia didn't really care if the phone lasted more than two years because it helped with their turn cycle. Okay? Same with most toys and anything else that was going on.
If you're a tester guy around mid-2000s, you're like, "Oh boy, what am I going to do?" Turned out, actually, Apple was one of the people that turned that around saying, "We're going to go with a really high-quality phone." Very disruptive to the market. You look at applications from data centers and mission-critical applications, electronic infrastructure, obviously an electric vehicle, or even more extreme, full self-driving.
You probably want something that's reliable. The content of, or the percentage of semiconductors that go into applications that really require reliability has increased. I guess if you look at how fast the overall market is growing in data center, which all is really important, it's really growing. That's the rising tide that's good for us. We've been doing this a long time. There's two major segments that you do this.
There's a package level, which is traditionally where people do this burn-in. There's an evolving, and one that's going on right now, where people are basically hearing our story, which we, if you will, invented this wafer level in a cost-effective way and have a huge amount of patents related to it, where we're pushing people to wafer level burn-in as opposed to package.
We're actually located in California. A lot of people have been going through there. It happens to be a great spot right now because the soul and the heart of AI is from Seattle down to San Diego with a bunch of it in Silicon Valley. We parade people through here and show this. We've brought on a bunch of additional power and infrastructure to be able to expand our capacity, up to 10X to even more than that.
We've done that in anticipation of some of these markets that we're addressing right now. Just a couple of pictures of our Fremont production floor. It's an updated slide to it, but you get a feel for it. People come in, and they're always kind of shocked and taken aback because of the amount of capacity that we've actually put in place, and we do that in California.
It's actually just assembly and test. The contract manufacturers are around the world. We're bringing things in here. We're also now brought up a second site in Asia that'll be doing high volume manufacturing of our packaged part systems. Just some market drivers, all the things you probably heard throughout the day. We changed the order of this a little bit to be more of the sign of the times.
Absolutely AI and data center are driving our business right now. It's consuming the first 20 hours of every day for us. We also see that the transition to what's called heterogeneous integration, the things that are happening with the processors where you're putting not only compute but memory on these CoWoS packages, is really disruptive to the whole burn-in market.
It particularly opens up an opportunity for wafer-level burn-in because when you test these devices in this form and it fails, you throw this whole thing away. If you test just the package in there and one of the devices fails, you throw the whole package away. The compute chip or multiple, and all the HBM and the CoWoS. The cost is significant. Our value proposition of why don't you move it to wafer-level all of a sudden really rings true.
We still actually see electric vehicle and infrastructure as a big driving piece. That's where we got to spend a lot of time with Jed following us, was around our involvement in that whole industry. We have a very large worldwide install base over all of this time. Last year, we actually added a whole bunch of new customers to this list with the Incal acquisition,
Which brought us package-level burn-in, and that was a really timely and fortunate acquisition for us. We had acquired this small company that was actually doing the qualification of what we now know is a very large number of AI processors, CPUs, GPUs, TPUs, ASICs, and also network processors. Okay.
With that, we got a visibility of what the roadmap was, and we started to realize that customers were not doing production burn-in of these devices, but they were failing in the data centers. It's like the perfect opportunity for us. Since then, we actually have led with one of the lead hyperscalers who's actually gone into production. They've ordered follow-on systems. They continue to order.
They're going to be looking at a multi-year ramp. For them, we're seeing the other hyperscalers start to follow suit, and at the same time they're talking about the package level, they're giving the story about, wait a minute, what about this wafer level? Okay. The difference between it is just where the insertion is. It is not whether you need it. These devices need a burn-in to be able to meet the quality requirements. It turns out there's even another extreme.
If you do it at the package level along the process, if you don't do it there, what we were seeing is people were taking NVIDIA racks and burning them in rack form. What a horrible place to do that. That's because they were failing, and at least it was better than sending it off to Google or Meta. Okay.
We came in and said, "Wait a minute, why don't we look at this package level?" There weren't any package level systems out there at the time, which people are like, "That's sort of surprising." They weren't buying them. And when they went to go buy them, the only people that had anything that was competitive was little companies like Incal that only could build one or two systems a month. That's not going to work.
It's very disruptive of people trying to figure it out, and it's still in the very earliest of innings where most of these processes still don't have production burn-in. They're all engaged with us, and that's what's driving us and our roadmap to be able to do it either at package level or we uniquely offer a thing for wafer level.
What that does is allows us to actually do the same burn-in of the devices. We can actually do it more aggressively. What I mean by that is we can bring it at higher voltages and higher temperature because it's more accurate and allows us to get the test time down, which is not necessarily good for us, but good for our customers. We then do the wafers and do that on screen of the die before they put it in.
We charge more for that. The cost of that burn-in is actually hidden in the yield advantages. It's cheaper to them, quite frankly. It pays for itself in the yield advantage by doing that screening of those devices at wafer-level or to get known good die before you put them into the package.
This is not something you'll see from anybody else. People ask, "Gee, I've never seen that before." I always remind them, if you do, we'll sue them. Okay. We have patents around this wafer-level concept of a portable cartridge across all of North America, Europe, Asia, Japan, and even China. We defend it aggressively.
Remind customers all the time that this concept of actually taking a wafer, putting it into a portable carrier that we call a WaferPak, and putting it into a tester is novel to us, and we have patents around it. That has been the key differentiator. When customers go out and throughout the day, people say, "Well, wait a minute." In package-level, do you have competitors? Yeah, we do.
There's different people, and we think we have the best cost, and we love our software the best, and we have the advantage of doing your qual, et cetera. It's a comparison, and we think we'll win more than our fair share. When it comes to wafer-level burn-in, it's just us. Again, lots of patents related to it. This is what a system looks like. This is with it a standalone.
Won't mean anything to you guys, but someone like me, this is like baby pictures. It's like, I love this thing. This system is actually, people walk up to it and they're just like, "This is just so different." You've never seen anything like it. You open up the door, and you can slide in 18 of these WaferPaks, close it for 24 hours, and come back. The system's sitting in the same footprint as a single wafer tester, and it costs a fraction per wafer for doing that.
We still make great margins on it. It requires this WaferPak, though, which is proprietary to us, and it's designed specifically for that particular wafer. They don't really wear out, so we call it a consumable, but it's not really consumed because it'll last 100,000 or 200,000 insertions, and it's six hours. That's a long time.
The reality is, a couple few years later, when they move on, those are just disposed of. They buy new ones from us. This is a key piece of our value proposition because that entire turnkey solution comes from us. During the last handful of years, we actually advanced the platform across our silicon carbide, gallium nitride, and now AI processors, as well as silicon photonics, by adding a fully integrated aligner on it.
All that means is the whole automation of packing the wafer into the cartridges and moving it into the slots or blades is all done hands-free. In fact, we now have customers, I think our silicon photonics customer is the first one. They have AGV robots. They don't even touch the machine.
It's all done electronically, and it's a hands-free operation, which is a big deal for a tester, much less a burn-in system. Since we've done this, and particularly as the AI customer and silicon photonics customers have gone fully hands-free on this, everybody is doing this. It's just like, I don't want to touch the wafer. Please don't touch my wafer. This has the ability to do this completely lights out and automated.
Just a footprint, people, that may not mean anything to you, but if you had 360 wafers worth of capacity, that'd be more like a football field. In a fab, which is clean room, everybody's bunny suited up, this is a big deal. We have an engineering system. You have to be a tester guy to love this stuff. This is the WaferPak contactor.
The idea of having a thing that can contact all the devices on a 300-millimeter wafer, and you can hold it with your fingertips, you'd have to be a probe card guy to realize that's crazy. It's all part of the whole design and allows us to make them very cost-effectively in very high volumes. So far, we do not license this to anybody else, and you must buy it. They actually each have a signature.
If you try to put something, introduce it into the machine, the machine will stop it. That has proved very well. Customers love it because it's completely turnkey. There's no finger-pointing whatsoever. Downside, of course, is it's just us. We've been able to work with multiple customers, some of the market leaders.
People understand that our original 10% customers on here, that's publicly stated, that actually led this, were Apple and Intel. Since then, we haven't been naming them. You're kind of guessing a little bit. There's some people out there that have a pretty good idea. It's the biggest companies in the space that typically are adopting this because of the volumes involved.
A little bit about burn-in. You said I'll tell you a little bit about it. This is called a bathtub curve. All this means. If you internalize a little bit of semiconductors, every semiconductor when it comes out has a failure rate. If you just observe it, the likelihood that it fails is one in a million or 10 in a million or 1,000 in a million. Typically, 1,000- 10,000 in a million, which sounds like a funny number.
Over time, and a reasonable number is like a year, they will drop to a point where they're the lowest failure rate, and they won't fail, the likelihood of failing, until 20 years. Everything that's going to fail, fails usually in the first year of life until about 20 years. That's about a good rule of thumb.
You can use accelerated screening on a tool like ours at either wafer level or package level to take, and within somewhere between 12 and 24 hours, I can take all of those failures out. You're going to take, people always say, "My devices were perfectly good until your tester." Well, they weren't perfectly good, but we'll take it, and you might lose 0.5% or 1% or 2% of your devices. We'll screen them out, and all of the rest of them will not fail.
This isn't just an observation. You can actually use the tester to then continue to burn it, and you can prove to yourself statistically that you're going to do this. This is very well known in the automotive space in particular, and something that we're spending a lot of time with the hyperscalers and folks around training them on this so they understand what to tell their suppliers to give to them.
You can, like we've heard, and you've seen these in white papers, et cetera, but in our conversation with the hyperscalers, you cannot do a training without one of the GPUs failing, and it crashes. They have to do all kinds of fun and games to actually get through a training event, and it's multiple times. It's like, why would you do that? One of the discussions is, well, you should do burn-in.
They're like, "Yeah, well, we don't worry about that. We have our vendor do it." Okay, do they do burn-in? I don't think they do burn-in, but they're responsible. They said, "They're responsible, but you pay." Yeah, that's a good point.
There's actually a transition going on right now where we're starting to see all the hyperscalers and the designers out there and end users start to push back and say, "Well, wait a minute. Why aren't we doing this burn-in?" Same thing actually we did on the EV side where we worked in front of all of the, call them OEMs.
These are the VWs and Toyotas and BMW and Mercedes and NIO and Kia, and we were in all of these guys showing them this so they could understand and appreciate what it takes to go tell your vendor to go do burn-in so these don't show up in your fleet. We have a package-level.
We still do package-level. There's a lot of people that want to do it. We do it for the quals, but we can also do that device inside. The hyperscaler is ramping right now on this. They have another device that's in qual that's also going to go on Sonoma. They said it's the third device we actually want to make sure we bring it up on Sonoma, but we want to bring it up on FOX, the wafer-level.
We're actually seeing as the discussions oftentimes we'll even have in the same meeting, someone comes in to talk to us about package-level burn-in to be able to do the screening, and an hour or two into it, they're like, "Okay, let's talk about wafer-level." We kind of joke about it because we have two VPs, and the package-level guy always goes like this, like, "All right, here we go again."
That's okay. He gets paid on it too. Okay? It's a piece of that. It's very interesting. My discussion with the hyperscaler is like, "Well, wait a minute. You're going to have two generations on Sonoma, and then you're going to go to wafer-level.
What are you going to do with the Sonomas?" He's like, "Who cares?" I'm like, "Like Zen." He goes, "The cost of the yield would be so advantageous we won't even use them anymore." I'm like, "Well, that's an interesting business." We'll see. In the meantime, we have both. You can do it in all the steps. We're okay with any of them.
I think it makes sense on all the numbers we've seen and in the discussions, if they can, they'll all move to wafer-level. Okay. These are online, I won't read it to you, okay, it talks about some of the package-level burn-in momentum, the fact that we've actually had, went from High Temperature Operating Life qualification through production with the hyperscaler. We're actually now engaged with multiple hyperscalers.
Very interesting again, half the meetings, more than half the meetings, it's like half of the meeting is on package and half the meeting is on wafer-level. We're kind of working through that right now. How do we manage all those different qualifications? Since we bought them, we've actually spun the tool and made it not just look more like an Aehr Test tool, but it's a much more rugged, robust tool that can be used for high volume manufacturing.
We put a handler on the front of it that we designed and had manufactured by a contract manufacturer. That actually allows them full automation. We have videos of this with AGVs loading up the JEDEC trays, and it's just taking it to a completely different level. We had meetings with people in Taiwan this week. They're like, "This is the only way we want to go.
Full automation. There isn't anyone else that does this in a burn-in system. Our favorite generally is we talk about the wafer-level side of things. It's been our key competitive advantage. We're the only ones that do it. We actually worked with an AI processor company now about a couple years ago it started.
They approached us because candidly, the idea of thinking we could actually do a full AI wafer sounded a little unbelievable because of the power. What we found through the engagement with them is that the test modes that are put into the TSMC wafers are very well matched to our actual existing product.
Now that we had enhanced that to a 3,500 watt per wafer capability on nine wafers, we were able to actually implement their wafer-level burn-in of their AI processors, and they're fully in production.
They started by doing system level, and then we went to wafer level, and now they're only doing wafer level. We're on their next generation device, and they're fully committed to this going forward. We've done a partnership with ISE and ASE, where now it's come full circle what happened. ISE and ASE have our systems for silicon photonics.
This customer walked by that and said, "Whoa, whoa, wait. Can I do that with my wafers?" That was the inspiration of it. Six months later, we were testing their wafers. Three months later, we were in production. We're ramping. This is really exciting for us, and we now have multiple customer engagements. I'll pause just to be really clear.
One of the notes from today, highlights, is so far for the people that are following our stock or following our company, we engage with a production evaluation with a major accelerator company, major AI processor company around wafer-level burn-in. It started around last September.
It's actually taking a little longer. We had some design issues that we're working through together to try and get it right because we together were misunderstanding what you need to do at wafer-level versus package. That's how I'll describe it. Long short of it, we were able to get their wafers up.
Last time I told you we were working on it. What I'll tell you right now is we have majorly or have completed the wafer-level benchmark. The data looks amazing. That's their comments, stay tuned for more information.
We'll probably give an update when we can do it more broadly publicly on July 14th at our earnings. Okay? That was a huge milestone for us, and we were, in fact, able to test their AI wafers. Okay? Big deal for us and a huge opportunity for us. Okay? I just use this. I'm not trying to name-drop. We haven't changed this person.
We threw the AMD one up there a long time ago. It's just the easiest one to describe. It has multiple compute processors on there and a whole bunch of HBM, high bandwidth memory, DRAM on it. This kind of drives that you can kind of just intuitively understand, maybe it's a good idea to burn-in the die instead of all of them together and then when one of them fails, because they do, you throw away the whole thing.
Because guess what. Statistically, only one of the probably, one, two, three, four, 8 x86s , of the 68 devices fail in that package. You're throwing away 67 of them. Okay. Not very cost-effective. One last thing. If you've seen my slides before, I kept saying optical I/O is coming. I've been doing that for 18 months.
There was all kinds of little seeds along the way of what was happening. I'm now changing it. It's now here. You're seeing it, major announcements by NVIDIA, what Intel's doing, what Marvell's doing, AMD's doing, of course, NVIDIA seeding all of the folks like Lumentum and Coherent. There's just a whole lot of activity. Why it matters to us, we actually have, I think, six different customers that are doing silicon photonics.
When you're fully integrated with the laser into the silicon photonics integrated circuit, and especially with an integrated electrical and photonics, we look really good. The scalability of that was led by a lot of papers like the likes of Intel, and that's where we really shine. We've got customers that are ramping in that right now, and this is great business for us right now.
We also talked about the memory side. We've engaged with multiple memory manufacturers in flash for the last couple of years. Last quarter, for the first time, I mentioned DRAM. Turns out there's some things having to do with the high bandwidth memory interface around the logic that tends to have some real advantages to our system. We think there's some opportunities here.
We continue to remind people, typically, we're still a year out or more, but we're actually finishing up the benchmarks with the flash guys, having discussions with the DRAM guys about taking this platform and applying it to the memory side as well. Just to give you an idea, people are always like, "Well, how big are the markets and which ones are bigger?" Et cetera.
We don't publish exact TAMs, okay? We do talk about the relative sizes as a % of the overall market to give you an idea. Everyone's like, "Oh, wow, AI is big." No, AI is really big. Okay? DRAM and flash are massive compared to the ones that we've been working on compound semiconductor. You can see, silicon photonics, we still think are going to be smaller than silicon carbide.
Gallium nitride ultimately will be bigger, but the flash is quite a bit bigger than that. DRAM's certainly larger than that, and the AI processors is sort of a dominant. We're clearly in the AI processors at package and wafer level. We've got the compound semiconductors. There's a hard disk drive application. There's some other assorted things, but just to put it in perspective.
We still put flash and DRAM in gray because we have not yet scored revenue against that engagements. We actually lead with this slide with our customers, but I'll end with it as well. One of the critical things that we have kind of, I guess, positioned ourselves as, when we do these wafer-level applications or we do these burn-in, we're focused on the critical burn-in requirements.
Turns out there's a whole lot of history of people where the burn-in was sort of more like an oven. People when they'll say, "Oh, we buy your ovens." I always say, "Don't call it an oven." You would just put the things in, turn power on and hope. We don't do that. Every single design includes 100% certainty that it was burnt in properly, and we prove that to every customer.
It's a big deal. In silicon carbide, okay, if you missed a silicon carbide in burn-in, okay, it has a 1% chance it'll fail during the life. My Tesla has 96 of them in them. You go through the math, you miss one, okay, you pretty much are guaranteed. You go through the math, right? The net here is you can't miss one of these things.
By the way, it makes a heck of a scene when a silicon carbide inverter burns up in an EV. Okay? We have proven that, and that has been a big deal. The farther down the food chain, whichever way it is, I don't know, closer you get to the customers, the more they appreciate that. That's been a big part of our value proposition to them, and they really like this story.
Do we, and we can be proud about that, but that's part of what you get when you work with us. We'll guarantee that, and we can show the engineers, and they can prove it to themselves. With that, I'll finish, and we have certainly a few minutes for a Q&A, and then we'll go into the next session.
Yeah, we can start the Q&A.
All right, off it goes. We'll keep it live, so we're going to stay on the internet, okay, you guys? I'll repeat your questions. Go ahead.
When a wafer fails, can the OEM go in and replace that wafer?
When a wafer fails, can OEM go in and replace it? In this case, we're testing the die on the wafer. There might be 80 die of an AI. The first answer is you don't replace the die. You would just say, "Get rid of that die and don't move it into package."
The advanced move, and there's some white papers out there, is you actually put redundant cores into the AI processor. What we actually do is while we're burning it in, we identify the bad ones, and you mask them out electronically so that every die is good. That's where everyone's going, and you can do that on the burn-in system from us. Question.
What's the advantage of testing the wafer level instead of doing what Advantest or Teradyne do? Why is it an advantage then testing facilities in California instead of Korea or Taiwan?
Okay.
Give them trade-offs. Yeah.
Yeah. First question is, what's the advantage of doing us versus what Teradyne or Advantest does? We're not doing the same step. I actually showed it earlier. I won't go back to it because I clicked through. They build a tester. Their systems are way higher performance from a frequency perspective.
They have more IO pins, et cetera, but they tend to test one device at a time for 5 to 10 minutes. Okay? That's actually what they'll do after wafer-level burn-in. After the burn-in step, they'll go in and test it to validate that it's perfect. Most customers will start by testing it, then burn it in, then test it again. They realize we don't need to do that, and they just burn it in first. We coexist, and it's a critical step to have Advantest V93000.
I was in the room when we named it that, by the way, in my HP days, or an UltraFLEX from Teradyne as example for that step. We're not an either/or. Okay? They're not doing the extended burn-in. If they did, the system, remember, you had an ASP of that system at $1.5 million- $2 million, a $500,000 probe or at a $300,000 probe card. There aren't enough testers in the world to be able to do a burn-in with those steps.
Why do test, was the next question, in the U.S. versus closer to your customer? Good question. We actually do assembly test in the U.S. That's where we've been doing it. We actually just brought up a line for our package part in Southeast Asia. We'll start shipping. The first four were built last month, and so we'll start shipping out of there.
We're bringing up 20 systems a month capacity for our package level. Currently, we're going to keep the wafer level systems out of Fremont. The headcount is not the big cost of it. That's just a choice that we have made. I know where the Advantest systems, I know where UltraFLEX systems are built. Yeah, it makes more sense to be closer to those guys. Most of the tools will go to Taiwan or Korea, which you're correct at. Next question.
I'll ask a question. One, I'm going to have to ask Trish how she feels about having the family photo album with your testers in it next to her.
Yeah. Trish is my wife, by the way. Yep.
I guess if I kind of rewind, we've known each other for a while, and I go back to the silicon carbide times. The message that you were sharing isn't that much different than what it is today.
Mm-mm.
My question is, what were the learnings in Silicon Carbide that kind of was it just a function of market? The differences that you can apply to these other markets today that lead you to believe that this is a more durable trend, other than the fact that AI is 5% of GDP and 93% of GDP growth.
Well, it's mostly that. No, I can answer that.
Yeah.
I think that got captured. I think I'm close enough to the mic, hopefully. The question was, how is this different than silicon carbide? Did I get that right?
Yeah.
Okay. Well, in silicon carbide, we were first selected for the EV for, really, it was actually around the Tesla side of things, but ended up being deployed across the industry. The reality is, when we first started this, we were very excited about the fact that prospects that at that time, people were projecting, and we were stating, and seemed quite bold, that by 2030, 30% of automobiles would be EVs.
Everyone's like, "That's crazy. But boy, that'd be amazing." Then a couple of years later, people are like, "Nope, it's all going to be EVs tomorrow." It's like, okay, that's a problem. Okay? It overshot it. The reality is 30% EVs are going to happen. Okay? That's actually not the debate. They're all still burnt in. You do not skip burn-in. You do it somewhere.
You either do it at the module, usually I carry one around, or you do it at wafer level. Nobody's skipping that burn-in. We've made that clear through all of our presentations across the industry. I've done multiple keynotes. It's pervasive. One of the things that's interesting is burn-in times when you started your models are up.
People, including us, thought that burn-in times would actually go down because typically they get better, but they don't go better for them. Worse for me, but the test times go down. They haven't. They haven't gone down at all. In fact, they're actually up relative to when we started.
The reason is people really understand, I think the OEMs are saying, do not skip that, and I'd rather put a couple more cents into that device and burn-in to get the better quality because they want it further down that bathtub curve. EVs, everybody's got it. You love them, hate them, whatever it is. I don't think there's ever been someone debating whether or not they're same.
AI processors, if you want to say, gee, there's a bubble, or there's a lot of margins, or huge margins or something like that, I get that. Okay? If you're saying that processors and inference and all are going away, that's a bad bet. If we look at these customers, one of our challenges, we're doing our internal TAMs, and we're looking at market analysis of everyone.
We're looking at it and we're like, I'm hearing directly from the hyperscalers what they're doing, that's not the same as what the market has. It's much higher. Who do I believe? I know it because I'm testing their parts. It's like there's way more processors that are being developed out there.
One of the things I always leave with people, and I'm not trying to be specific about anybody, but when we're looking at, say, Google, how many processors they have, it's like everyone, you know, you can get them to say that they've been building these TPUs since 2016. What were they doing before ChatGPT? That's a good point. Everybody's focused on the ChatGPT training and inference. What are all the TPUs doing? They weren't doing that.
There's a huge number of processors that are being used in the data centers that are not tied to the data center training and inference. When you hear this whole trend that's happened over the last year, we've had our fingers on it, on the CPUs. I think it's easy to describe it as inference, but in reality, there's a huge number of tasks that are done in the normal implementation of an agentic AI.
They bundle it with AI, but AI is actually asking the CPU to go do a task like open a restaurant, go set an appointment at a restaurant or something like that. There's a huge number of processors that are continuing to grow, and that's going to continue up for the next number of years.
People, the deployment of burn-in is still at a very small percentage, in particular at wafer level. I think it's different.