Hey, everyone. Thanks for joining Needham's 27th Annual Growth Conference. My name is Shadi Mitwalli, and I'm part of the semiconductor team here at Needham. It is my pleasure to introduce Atomera. Atomera develops and licenses technologies that offer semiconductor designers and manufacturers a low-cost, low-power, and increased-performance solution when designing transistors. Joining me from the company is President and CEO Scott Bibaud. Scott will take us through a presentation followed by a short Q&A. Scott, take it away.
Thanks, Shadi. Appreciate that. Yeah, so today I'd like to give you guys an overview of our company that will be useful for those who are new to the name and also, hopefully, give some more information to those of you who have been watching the stock for a while. So today, yeah, that's what we'll be going through. Our company is really focused on delivering our key technology, which we call Mears Silicon Technology. It's a thin film that we can apply to semiconductor wafers when they're being manufactured. And ultimately, what it results in is that we can make transistors higher performance and lower power. And so that brings lots of benefits to wafer manufacturers, all the same benefits they'd get by going to a lower node, including lower cost, higher performance, and so forth.
Although we can actually deposit this thin film on wafers ourselves, we are not a manufacturer. We're a capital light technology licensing business, which means we have a very extensive patent portfolio which we license, but we're not a patent licensing company. We're a technology licensing business. We help our customers to understand our technology, to optimize performance on their wafers, and then teach them how to use it in their manufacturing, and ultimately, they'll pay us a royalty on that business. Today, we're engaged with more than half of the largest semiconductor makers in the world, and we have licenses with several of them right now. We hope to be growing that even more in the future. We have a very strong team to commercialize our technology, and as I said, a very deep patent portfolio of more than 300 patents related to this area.
Let me explain briefly what Mears Silicon Technology is. We call it a quantum-engineered silicon solution. It does use some very advanced atomic-level techniques to get higher performance out of transistors. And we actually have used computer modeling over the last 20 years to design this material. We typically deposit the material in a semiconductor in layers. As you can see in this, this is actually an electron microscope picture of a transistor with MST layers that you can actually see here. If you look over on the right, you can see where we would typically put that between the source and the drain and the silicon substrate. And it can form something that's called a superlattice, which has many different benefits, including speeding up electron mobility by eliminating some of the scattering mechanisms that would normally slow down electrons. It also can prevent leakage and improve power performance.
It improves variability, which means people can actually make those transistors smaller. You can see that with those three things I just talked about, you get higher performance, you get lower power, and you get less expensive devices because you can make them smaller. Those are all the benefits you'd normally get by transitioning from one node to another. You don't actually have to build a new factory in this case and do all of the work of bringing up a node. With this single step, you can get many of the benefits of that. There are a few major manufacturers of the type of equipment that's used to deposit our technology, Applied Materials, ASM, and Kokusai are three of them. We work very closely with each of these companies and have done so for more than a decade.
So importantly, if our customer decides to go to production and they reach out to their equipment supplier, they know who we are. They can vouch for our technology and help them to install it. One of the things that we try to do with investors is to explain where we are in our development with various customers. The customers are very secretive. They don't like to disclose much about what they're doing with us, but we do have a lot that's going on at any point in time. And so we talk about our work with customers in very similar to the way that someone in the biotech industry might talk about that through our phases of engagement with a customer. And you can see we show six phases here from the first when we're first getting serious with the customer, starting to plan to do some development work.
We have metrics for what it means to be in the planning phase. They go through something called setup. And then they get into this integration phase, which is where they're running wafers with us and actually doing a lot of testing. This is the most important and, in many cases, longest-lasting phase of work we do with people. Finally, they'll install our technology in their fab and run wafers themselves. When they're ready to go to production, they do final production qualification, and then they get into volume production. We have three different ways that we make money in that process. First, engineering services. We do charge customers to do certain development work with them. That's not the major driving revenue for our company. What is the biggest driving revenue for our company are our licenses.
And we have upfront license fees and ultimately downstream royalties, very similar to the way that ARM or one of the other better-known licensing companies would have. We have three different licenses. We have something called an integration license, which is used when people are doing development work where we ship them wafers and they need to do a lot of testing and development. When we install in a customer, we have something called an R&D license, which gives them the rights to build MST wafers and do lots of testing with them. But they don't have rights with the R&D license to sell those wafers or to sell products based on them. They need another type of license from us called a high-volume manufacturing license before they do that. So the three licenses here make up one package of licenses that we give to customers.
The license is typically applicable to a single production node. And so with any particular semiconductor manufacturer, we have a number of different licensing opportunities that we could get with them. Ultimately, when they finish the development, they'll be paying us a royalty on every wafer they ship or on every chip they ship. And this blue box here is the reason why we have the company and what our ultimate goal is. We also do something called joint development agreements, which span from engineering services through licenses to work jointly with our customers to get to the royalty stage. Today, in those different phases, we have 20 different customers and about 26 different engagements, with two of them at the installation level right now. Today, we are working with more than half of the largest semiconductor makers in the world.
And so you can imagine that our customer typically tends to be the very largest semiconductor makers. And although there's not a huge number of them, maybe 20 or fewer that are really interesting, we're working with a lot of those guys. And we have multiple engagements, which is what we would like. We would like to get involved with one customer and start to land in that customer and then expand to build our business out with multiple areas within that one customer. This chart is showing you some of the benefits that MST can bring.
You can see they span from some of the older process nodes that are in production today, like at 180-nanometer, where they're doing power and RF and industrial type of products, all the way up to the most bleeding-edge nodes, like 2-nanometer, that's under development today by a very small number of manufacturers. We provide benefits in many different ways. We can break them down, at least at a high level, into mobility, doping engineering, and reliability. You can see based on this chart that depending on what technology area we're working with, there are different levels of benefits for each of those three that we've provided. As we get out here into the bleeding-edge, you can see we bring huge benefits on mobility, doping engineering, and reliability. That's important for the bleeding-edge gate-all-around devices as well as memory devices.
I'll talk more about that later. Today, although we work with customers across lots of different nodes and lots of different technologies, there are four main buckets where we're focused. MST -SP or SPX is power devices, typically operating between five and 48 volts. We have MST for RF-SOI, which is used in cellular front ends for consumer electronic devices like mobile phones. MST for advanced nodes, that's the three nanometer, two nanometer, and other new nodes that are being developed. MST for DRAM. Let me just briefly talk about each of these segments to give you a better idea about the opportunities we have in front of us. First, MST -SP and SPX. This is in the analog and power market, which is not the sexiest market in the world.
It doesn't get a lot of press, but it is a very large market, $52 billion this year, including both CMOS and compound semiconductors. We introduced something called MST -SP for 5-volt devices in 2022. Frankly, we'd been working with customers on that for many years before. But this is an area that we think has got lots of opportunity because 5-volt is typically used in power management devices, which are very, very widely used in mobile phones and any other battery-operated devices. It's one of the biggest segments within the power market. But when we started talking with customers on 5-volt, they also expressed a lot of interest in going beyond 5 volts - 48 volts. So we've developed a new technology that we called MST- SPX. We introduced it in 2023 and have had a lot of customer interest in it.
And one of the reasons is that we believe it will provide best-in-class performance compared with many, many other manufacturers out there. You can see on the right this chart that's showing the best performance benchmarks that are available from a number of the other big manufacturers of these types of devices on the chart. And lower right in the chart is better. And you can see where our technology is providing better performance than most of the others. As a matter of fact, this dotted line is the theoretical best performance than people could achieve. And we seem to be achieving even better performance than that. This is one of the reasons why ST Micro has decided to work with us. And when someone like ST does work with us, this is what our productization cycle looks like.
We start working with customers with simulation, which is something that's called TCAD in the industry. That's what they use to develop new devices and transistors, and we have a product that we call MSTcad that bolts onto the edge of industry standard TCAD to help people understand how MST will help them. When they can do MST installation in their fab, then they can run wafers that are manufactured with MST. In fact, we can also do the MST deposition to allow people to run MST wafers, and then finally, when they get the wafers done, they can do silicon validation, and that allows them to look at what was the performance improvement that we actually achieved on silicon versus what we were predicting under simulation. They take those results, they put them back into the simulation.
They do a number of iterative runs, so they get higher and higher performance, and the TCAD models get more and more accurate until the point where they believe they've fully optimized performance. At that point, they release something called a PDK, which is a process design kit. And that allows chip designers to start using the new transistors that they've developed to do their new chip designs. Those chip designs will happen on a number of different chips in parallel with that new process being qualified for volume production. And once the process qualification is complete, you'll see high-volume production begin on all of these chip designs. That's when we'll start to see royalties coming to us. So we're in the middle of this cycle with STMicroelectronics.
They don't want us to talk about exactly where we are, but I can say this is the path that we're working on with them. And it's also the path that we'd be working on with most customers who would be going to production with us on our standard silicon. Last year, we started talking about work that we had underway on compound semiconductors, which is also in the power area of the market. The market is growing really rapidly here. It's a very exciting and exciting segment that's getting a lot of market attention right now. And one of the big problems they have in this market is they have to grow these compound semiconductors on top of substrates that have lots of different layers of different materials. And when they grow them, those different materials all have different coefficients of expansion and contraction.
When they grow them at very high heat levels and then cool them down, typically the top layer, which is the compound semiconductor layer they want to use, can be very defective. It can have a lot of cracks, defects. It can cause the wafer to bow and warp. If it bows or warps too much, then it won't be able to go through the subsequent semiconductor tools that will continue processing the wafer. Obviously, this causes yield problems and limits the ability for the substrates for them to make really inexpensive devices in this area. MST, we believe, can help solve that problem. Last year, we did some early experimental work with Texas State University, which gave us data that indicated it's true we really can help to solve some of these problems.
Later in the year, we announced a partnership with Sandia National Labs where we're running wafers with them. And we believe that those experiments will show MST can bring a big solution to the market. And because this is not a full chip integration, but it's just integration onto a wafer, it allows us to, we believe it'll allow us to get to production much more quickly than we would with our traditional business. And so we're very excited about compound semiconductors. And hopefully, we'll be able to announce a lot more on that in 2025. The next market I want to talk about is the advanced node or gate-all-around market. In the last few years, as we've gotten to three nanometer and below, gate-all-around technology has replaced the FinFET technology that was used in the kind of 16 nanometer - 5 nanometer nodes.
And gate-all-around solves a number of the problems that FinFETs had, but it's very, very complicated to make. But even today, the predictions are that the three nanometer node alone is going to be worth about $26 billion by 2032. So you can see this is a very large and fast-growing market. And the demand for that is really driven by the AI chips that NVIDIA and others are in production with at TSMC and elsewhere. Now, one of the big important changes that's happened as they're getting to these really small geometries is that gate-all-around uses a lot more epi than they have in the past. They use less lithography and more epi. Now, when they're using epi, it's very, very easy to add MST as another step of the epi. You can imagine a wafer is in the epi tool. It's running some process.
Then they can just add the MST steps to add MST, and then they move on to the next process without having to move it out of the tool and into other tools. So as epi becomes more important, it's a major opportunity for MST to get added. It lowers the barrier to getting to have MST added to the process. And you can see over here, MST does provide a lot of solutions to some of the big problems that people are looking at solving to make gate-all-around transistors easier to manufacture and higher yield. And so you can see I won't go through these here today, but this is just some of the areas that we think MST can solve problems. And we also believe our customers and we are coming up with new ideas about how it can be used every day.
MST for DRAMs is another area that we think is a huge opportunity. The market size here is even larger. And you know one of the things that's driving growth in that market is High Bandwidth Memory, which is a very high-growth area that's focused on AI as well. I talked a minute ago about how epi is because they're using much more epi in gate-all-around. It's an opportunity because it's easier to add MST. It's the same thing with DRAMs. In the past, DRAMs have avoided using a lot of epi, but today they're using more and more epi on the more advanced nodes and in High Bandwidth Memory. So it's a great opportunity for MST to get in there and solve some problems they have. One of the biggest problems they have in DRAM is variability.
High variability between transistors means that you need to design the transistors larger to take into account the variation that they'll have during the manufacturing process, and that increases the cost, and also bigger devices take more power. In particular, on DRAMs, in the periphery of the DRAM, they have something called a sense amp, which is used to sense what the memory cell actually has in it, a 1 or a 0, and because the variability can be big, it prevents the sense amp from getting shrunk as much as they would like. It also impacts the refresh rate that people have when they're making sense amps, so obviously one of the big drivers in power on DRAM is how often you have to refresh that DRAM device, which is why they call it a dynamic RAM.
If you can minimize the amount of refresh cycles that you need, it's really going to cut the power on the DRAM, and we believe that by improving the variability on the sense amp, it will allow them to make the sense amp smaller and reduce the power and required refresh level for that sense amp. You can imagine how important that would be for hyperscalers that are consuming so much power under the new loads that are being driven by AI today, and finally, let me just talk briefly about RFSOI devices, our fourth market. The RF-SOI substrate market is about $600 million in 2024. It's also a rapidly growing segment, and primarily, where we're seeing RF-SOI substrates in use is in the front end of consumer electronic devices that need RF, like cellular phones and Wi-Fi and so forth.
Now, RF front ends are getting more and more complicated, especially in cellular, where the demands for the newest 5G and beyond cellular are driving many different bands and very, very complicated front ends, and the ability of the chip designers to keep up with these new standards and keep the power consumption on those devices low is increasingly difficult. MST is one tool that a very, very rare tool to help them continue to advance those devices in the future, and so we think it will be widely adopted. We are deeply penetrated today with different RF-SOI device manufacturers and designers as well as with the RF-SOI substrate makers, so this gives you a really good picture of our four different market segments and where we stand with them, and let me just say a few brief things about our financial overview.
First of all, as of our last earnings announcement, we have more than a year's worth of cash, about almost 15 months' worth of cash on our balance sheet. And we run our business very lean because our overall goal for the company is to be able to grow that top-line revenue without having to grow our OpEx very much so that we can bring very large amounts of leverage to the bottom line. That's the promise of a royalty type of licensing business like ours. The promise comes with challenge getting there, which we've been working through over the past few years. But I do feel like right now, what I've shown you on the last few slides, the dynamics are all moving in the favor of MST and material solutions coming to the market and delivering.
So we really hope that in the near future, we'll be able to start driving that revenue growth, which will bring the very strong leverage to the bottom line of our technology, of our company. So finally, let me just summarize by saying we are a high-margin recurring revenue financial model. We think the financial model is going to be our biggest strength. Today, we've got a very strong technology position, patent position, and balance sheet traction with some of the top players. And we believe we'll be ramping commercial license revenues in the near future. So with that, I think, Shadi, we would be happy to turn it over to questions.
Yes. Thanks for holding out, Scott. Yeah. First question in the chat is, can you give any updates on CHIPS Act funding? It feels like the government's move to domesticating the semiconductor supply chain is becoming more critical, and Atomera's technology fits that agenda, so just curious to see how some of Atomera's meetings in DC have been going.
Yeah. Let me take this opportunity to introduce Frank Laurencio, our CFO, who can handle that question for us. Great.
Thanks, Scott, so I think the CHIPS Act is definitely giving us a lot of opportunities that we've not yet actually leveraged any direct funding opportunities from them, but a number of indirect ones and some other opportunities looking forward. The first is that we are working in ASU's facilities. That's where we've leased our epitaxial reactor for since 2021, well before the CHIPS Act.
But that also puts us in one of the key hubs under the CHIPS Act, with that being the Southwest Advanced Prototyping Hub under the CHIPS Act. And so that gives us a look at a lot of different opportunities that we might be able to leverage. Since we don't buy our own equipment, it's not something that we have a lot of opportunity for direct funding on. But where it has given us a lot of opportunities is in some of the new efforts that we're making around, for example, gallium nitride and other compound semiconductors that we might work on. So we submitted a response to a funding proposal last year. No awards have been made on that, but that would be an area to really help fund the work that we're doing in those compound semiconductors.
We announced a couple of months ago that we are now testing how wafers that are built with gallium nitride using MST would actually, how devices would be fabricated in gallium nitride on that. We're doing that at Sandia National Labs. That's not under any CHIPS Act funding because it's actually a program that's at no cost to us. But pending the results of that effort, I think it would open up other opportunities for us to take advantage of future CHIPS Act funding. So I think it continues to be promising to us, probably more something that we take advantage of indirectly because of our customers being recipients of CHIPS Act funding and that opening up possibilities to make it easier to buy the equipment needed to use MST.
Great. Thanks for all that. And then next question is, you guys mentioned working on a quantum-engineered silicon. Are you working with or partner with any quantum computing companies on that technology?
Quantum computing is quite different from quantum-engineered technology, but I would say today we're not really exposed very much to the quantum computing market. When we say quantum-engineered material, it has to do with the phenomenon that MST has when we deposit that material and how it affects the atoms and the movement of atoms within the silicon substrate within our material. Yeah. So not really connected to quantum computing.
That makes sense, and thanks for the clarification on that. Yeah. I'm not seeing any further questions. Scott, Frank, thanks for the presentation. Yeah. Thank you, guys.