Good afternoon, everyone. Thank you for joining us for the second annual Rosenblatt Age of AI Scaling Summit. My name is Kevin Cassidy. I'm one of the semiconductor analysts at Rosenblatt Securities. It's my pleasure to introduce Brian Faith. Brian has been QuickLogic's CEO since 2016. Unusual for Silicon Valley, Brian's been with QuickLogic since 1996. He's held multiple jobs from engineering to VP of worldwide sales. We invited Brian to our conference because we think the company has developed some interesting technology in eFPGAs that we think is stimulating new growth. We don't cover QuickLogic, but just thought it plays in very well with our AI theme of what QuickLogic is working on now.
Also joining us from QuickLogic is Elias Nader, CFO, and Jim Fanucchi, QuickLogic's IR manager. Brian's gonna kick off the meeting with just a few slides with an overview of QuickLogic, and then I'll follow up with questions. Also, please send your questions to firesides@rblt.com or use the Q&A feature on your Zoom screen, and we'll prioritize your questions over mine. With that, I'll turn it over to Brian.
Thanks, Kevin. Thank you everybody for joining today. I am gonna share my screen so that we can share some slides and set the context for hopefully an entertaining and robust fireside chat. Can everybody see my screen okay? Great. All right, for background, QuickLogic, publicly traded semiconductor company. We are fabless. We're based out of San Jose, sort of in the heart of Silicon Valley. What you'll notice on the right side here, are we have a full stack offering of different technologies that actually lend themselves very well for AI-type applications since the topic of discussion today is around AI. We have embedded FPGA IP. This is a fundamental IP that we've been using ourselves for the last 30 years and have recently started to license to other folks. We build discrete FPGAs from that IP in the yellow.
We have built and sold SoCs, which have the FPGA IP plus other processing cores. Then through acquisition, we have an AI software platform company called SensiML, which I'll spend some more time later on. As you can see, vertical stack all the way from IP for folks that wanna do their own chips, discrete devices when they'd like us to be the storefront to sell those devices, and then AI software, optionally on top. We've got a really compelling offering around all the different ways you may wanna deploy and accelerate AI into the market. From a leadership point of view, we're really proud that we're the first programmable logic company to contribute and embrace open source FPGA user tools.
For those of you familiar with the FPGA market, FPGA user tools have long been sort of the walled garden of FPGA vendors in locking people in. We actually felt through some collaboration with Google and other companies out there that embracing an open source tool suite would actually open up programmable logic to be used in a much bigger market that we believe is about $1 billion, as you can see there. There's tremendous upside and market potential for QuickLogic to gain market share by going this route. We're proud to be the first company to do that, and a lot of what you'll see in the slides today are derivatives of us using the open source user tools. We are a platform company.
As I was saying on the first slide, we have IP, we have devices, we have AI software. Really, we can meet the customer where they are in terms of what they need from a technology perspective in order to accomplish their goals. We've got lots of ways of monetizing that you'll hopefully glean through the following slides. Initially, a lot of the devices and IP we have have been focused on low power applications, ones that you'll see in the bottom left corner, like wearables and hearables and really low power IoT. Increasingly, as you'll see, we're starting to get pulled into some higher computing requirements. High performance computing, defense applications, a lot of this around AI that you'll see is sort of the theme of the end use cases here.
Because we're fabless, there's a lot of operating leverage for us as a company. We can do IP design, license that. We can do devices and be the storefront. At the end of the day, all of our manufacturing is done with our foundry partners, of which we work with all the main ones around the world, like TSMC, GlobalFoundries, et cetera. Big market, about $1 billion in sort of available market. In the last year alone, we've really been starting to make some inroads and grow our design win funnel to capture a lot of that market. As far as growth goes in fiscal 2022 so far, in Q2, revenue was up by 58% compared to a year ago.
Gross profit dollars were up compared to a year ago. New product revenue was up significantly from a year ago. The business bottom line performance since 2010 from an EPS perspective, we were at break even. We see the potential to get to profitability in Q4 this year. What has changed in this last year? The big change for us is that we are now closing a good cadence of these large eFPGA contracts, the largest of which, $7 million, we announced on our last earnings call. This has the potential to be upsized by tens of millions of dollars. That was added on top of what was previously a $9 million set of eFPGA IP related contracts.
I think we've really turned the corner as far as developing our platform and our sales strategy to go capture that market. Now you're starting to see a good cadence of wins every quarter from us on that line of business. If you remember on the very first slide, I talked about our AI software platform on top. We've gone through a really refocusing of that group around focusing on six-digit or more deals, not chasing students and hackers and whatnot that you may see other AI software platforms being used for. They closed the first one in Q2, and we talked about closing additional ones before the end of the year.
When you net all that out. Big funnel increase in terms of won designs or designs that are very late stage, and totaling about $100 million. Again, how did we do that? How did we sort of turn the corner on the size of designs and number of designs? It really comes through the automation and the go-to-market strategy. Australis is an IP generator. It's what we use to do things much more quickly and more cost-effective than our competitors, so we're very agile in that sense. And then again, SensiML, really focusing in on partnerships and customers that can move the needle and fan out to several customers beyond that. Lots of operating leverage. What is Australis?
Australis is essentially QuickLogic's tool that we use, our engineers use, to create our IP in an automated approach for what a customer needs. Semiconductor IP is really important that you meet the customer where they are in terms of foundry and process combination. If you're reading about all the semiconductor investments going on in the world today and in the US through the CHIPS Act, a lot of that is about building out foundry capacity and bringing online more aggressive process technology. You'll hear things like 7 nanometer, 6 nanometer, 5 nanometer. Every time that an IP vendor ports to one of those nodes, historically, it would take us more than a year and more than $1 million just to do that port.
That really limited the market that we could sell to because we had to find people that were patient to wait for a year and willing to spend a lot of money per design. We totally revamped the way we do this through Australis, so that now we can do a port in about three months and meet the customer where they are in terms of foundry and process technology. That is what's led us to this $60 million in new eFPGA agreements, since a year ago, since July. Once the folks either take the IP from us or they do some service work with us, eventually when they deploy that IP in their own chip, that's when our royalty flywheel starts. You'll see examples in the world where customers are.
Sorry, excuse me, IP vendors have actually built a substantial business just once the royalty flywheel starts. We're looking forward to seeing how this plays out, both in terms of royalties in the future and this continued growth in the contracts that we sign. Again, all based on the fact that we now have a very fundamentally different automated approach to our development with Australis. If you look back in time, you can see that, you know, a few years ago, we were just selling discrete devices. We were just doing the AI software.
Over the last few years, we've been very purposeful in laying the groundwork for now, where we actually have all this automation, we have these great partnerships, both with government entities like DARPA, large semiconductor companies like you'll see there, like Silicon Labs and Microchip, to really drive it forward now in a much more scalable way. I'm really proud of the team to get to this point where now it's really about closing and executing deals, not about building the infrastructure that we had been doing for several years. We're at that tipping point now. I mentioned DARPA. Just to summarize that, DARPA is a defense research program in the United States.
They fund development of technologies, and then they try to make it easy for the defense primes to do commercial business with suppliers like QuickLogic. We actually are part of the DARPA Toolbox. It makes it easy for defense primes to work with QuickLogic. We have a long history of doing work with defense companies, so we're proud that DARPA selected us for this relationship. Then if you zoom out and just say, "Well, who buys all this stuff from QuickLogic?" These are just some examples of logos, either of partners or customers. This is ever-increasing. The ones that we've announced, well, the $60 million in IP that we have announced, none of those folks are actually shown here because those are all tightly kept under NDA with those customers.
To the extent they allow us to share their logos, we'll be doing that in the future. On the defense side, I think it's important to note we work with all five of the top five and eight of the top ten DoD primes in the U.S. We do have a big presence in that space already as a trusted supplier for their types of electronic needs. On the SensiML side, a lot of build out with the microcontroller companies.
This is really important because every time SensiML signs up a microcontroller partner, we're getting access to that sales and marketing force of the microcontroller partner to fan out into their existing install base, sort of the brownfield, if you will, as well as new opportunities that they bring to us on new design sockets with their microcontrollers. Keep an eye on the news for that because the more that we announce in that space, I think in my mind, I could just think of those are more fan-out opportunities to drive top-of-funnel growth. Rounding it back out really quickly, I think there's some substantial revenue growth opportunities that's all based on the fact that we've really turned the corner, both in terms of focus with SensiML, building out the fan-out approach with those partners.
On the FPGA side, the fact that we have this automated approach with Australis, that's leading to us being much more efficient in identifying customers, closing customers, and then delivering for revenue. That's what's led to the big revenue growth, the gross profit dollar growth, and the increasingly better financial performance leading to what we hope is profitability in Q4 of this year. This you can look at afterwards, revenue by quarter. Gross margins, as you can see, are up substantially actually from a few years ago when they were down in the thirties. Q3, just for clarity here, the revenue forecast is down from last quarter. This is really two things.
Smartphone sales softening in this quarter, some inventory digestion going on with our largest customer there, and then the $7 million contract actually starting about two months later than we thought. That's pushed out some of the revenue from Q3 into Q4. We've already said Q4, we expect to be popping right back up to where we left off last quarter. With that, I will turn it back to you, Kevin, and we can start having the fireside chat.
Okay. Thanks, Brian. Yeah, I'll just walk through each one of those product lines. First, you know, the eFPGA, the SensiML, and then your standard FPGA. It seems, you know, of course, the most interest is in the eFPGA, right now. You know what? I guess, what happened in the market that suddenly there is a demand for FPGAs in ASICs or, you know. I guess, you know, it wasn't too long ago that maybe 10 years ago that ASICs were put out to dry, like it was no one was ever gonna build an ASIC again, and now it's very popular and they even wanna have FPGAs included. What changed in the market for that?
That's a great question, and I think there's a few things that have sort of created this confluence of events. So just for everybody's background, FPGAs in general are about an $8 billion-$10 billion a year market. So they're not small, but it is a single-digit % of the total semiconductor market. Why do people use programmable logic in general anyway? It's because standard products don't exist that serve their needs, to put it really simply. It could be that they don't have enough compute. It could be that a customer has some secret sauce that they wanna implement at the silicon level. FPGAs are a great way of getting a personalized implementation in hardware. Now, that's great, and that took the market to $8 billion-$10 billion a year.
What's happened in the last couple of years is that you've started to see acquisitions happening. Actually, the two largest standalone FPGA companies, Altera and Xilinx, are now part of much bigger companies, Intel and AMD, respectively. Whenever that happens, you start to see a void being created for the masses, and that technology is sort of trending more towards the needs of the parent company. At the same time, we see the supply chain issues that have gone on in the last two years and just being able to buy products off a shelf that are standard products.
A lot of companies now, especially the medium to larger ones, are saying, "If it's hard for me to get a product and I have a need for that technology, maybe it's about time I started looking at taking control of my destiny and doing my own chips." You're starting to see a lot of people now vertically integrating and doing their own silicon so that they can really, A, take control of their own destiny and, B, put in the chip what they want and what they need, not just a standard product that everybody else can buy. If you think about that, yeah, I wanna do my own chip, but there's still $8 billion-$10 billion of FPGA sold every year. That technology need doesn't just go away.
What happens is they need that technology to be pulled into the chip that they're building. That's what's actually driven a lot of the interest of our eFPGA IP licensing. We have the fundamental technology, and instead of forcing the customer to say, "No, you can either buy my standard product or nothing," we're saying, "Yeah, if you want an IP, we're happy to license that for you." Now, the next step, of course, is, well, if they're doing their ASIC at TSMC six nanometer or Samsung 28 or GlobalFoundries 22, we have to make sure the IP is actually running on that foundry process combination so they can use it. A lot of the things you've been seeing from us from a news point of view is about that, porting to all those different combinations that the customer would need.
Fundamentally, the overriding need for this in the market is programmable logic is a well-adopted technology for different functions, customization, AI acceleration, et cetera. More chip design happening in the world today. They need that, and they need that in the form of an IP. Now, the other thing you'll start to see, and you've started to see us drop breadcrumbs about this, is that some customers may not be ready to take that full leap into, "I want that IP and I'm gonna put it in my ASIC." They might say, "I'm gonna do an ASIC," or, "I've already done an ASIC. How do I get access to that FPGA and I could put it in my package, but not my chip?" That's where chiplets come in.
The chiplet strategy is really around partitioning a design into pieces almost like Legos, which ultimately yields better cost and better time to market for the customer. That's why I keep coming back and emphasizing we have different ways of monetizing our technology, of delivering it to the customer. Frankly, we don't care whether it's IP or devices or chiplets, as long as it has a QuickLogic function inside. That's, I think you're starting to see a lot more news about chiplets as well as a driving need in the market for programmable logic. Back to you.
Exactly. You know, when you talk about the big guys, the Xilinx and Altera, the size of their FPGAs are, you know, massive, right? I mean, you wouldn't take that entire FPGA and put it in. You know, how many gates are you selling into an ASIC?
That's a great question, too. I mean, the FPGA market for discrete devices goes up to multiple millions of logic gates, the way that they count FPGA density. Generally speaking, if you're just gonna do that exact size, just go buy something that's already done, right? Don't reinvent the wheel. What we're seeing as far as IP goes is sort of that range of tens of thousands to hundreds of thousands of gates, where it's meaningful enough to do functions that you know are not so simple, but it's not so big that you might as well just go buy a discrete device. It's in that sort of sweet spot of tens of thousands to hundreds of thousands.
By the way, if you just look at the FPGA market in general, I would argue that most of the volume and most of the total dollars is in that range of FPGAs. It's not the 10 million gate Xilinx FPGAs, for example, that it's really driving a lot of the top line. It is that sweet spot.
Okay. Yeah, I think driving the ASICs is also all these AI workloads that you just can't even buy a GPU and run it at low enough power to run some of the workloads, right? So that's the
Yeah, I mean, FPGA is really interesting for AI. There's a couple reasons why. One reason why people use FPGA technology is because you can make a serial operation as parallel as you want it to be, because FPGA is programmable. That's one way of getting acceleration is making things concurrently programming or parallel processing, if you will. Instead of using one core, use 35, use 36, use 72, whatever it may be. FPGA is great for that because you can determine what you want it to be for your workload. The second reason FPGA is increasingly popular, and this is a really important one for AI in particular, there are more AI papers published every day on different algorithms of doing AI, different approaches.
It's impossible for custom silicon, fixed silicon ASICs to keep up with that level of innovation in AI. It's just impossible, because it takes more than a year to do a custom chip. You're already out of date by a year the first time you get your chips back from fab. A way of handling that situation is if you use FPGA, you can basically reprogram that FPGA as fast as that person who did the paper can create an algorithm in C code. You're actually able to do hardware measurements of performance increases for AI immediately. That's a big driving factor around why people are looking at FPGA technology, both for discrete FPGAs, but you could also imagine a lot of people are doing AI chips, AI accelerators.
Why not have FPGA be a core on that, so you get some sort of a heterogeneous approach to solving the problem? We're seeing a lot of interest in that today.
Okay. You know, you talked about, and you know, you booked a $7 million deal, and you've got, $16 million backlog and $100 million in the design pipeline. Can you give us a, you know, relative feel for what the NRE charge is or the license fee is? Once it's in production, you're collecting a royalty. Maybe what does the revenue stream look like for QuickLogic?
Without going deal by deal, I'll just start with the knobs that we have available to us for any of these engagements, is there's upfront license, there's back-end royalty once the device goes into production, and there's units shipped, and then there's services that we may charge to do initial porting or customization work for a customer. Those are all the knobs that we play with to make sure that there's a business arrangement that works for both parties. For the $60 million here, I mean, the average size is clearly a seven-digit number. By the way, if you'd asked me two years ago, "Would these be seven digits?" I would have said, "No, that's crazy.
They're gonna be somewhere in the three digits. What we're seeing now is that there's so much value to the IP, and there's so much value to the know-how that we have as far as integrating that and implementing it in the customer's chip from our 30 years in this, in the FPGA industry, that our value is actually up substantially. All of these deals now we're talking about are 7 digits. Again, they're comprised of those different knobs I talked about. I will say that anything that we've disclosed publicly as far as deal size or funnel size, it really doesn't contemplate the royalty components of that, because the royalty is, you know, so far in the future when the customer starts shipping those units.
The other thing I'll say is that what we found more often than not is that our announced deal size is actually less than what it actually becomes. Because the customer also, they start to get into the technology, "Oh, can you do this? Can you do that? This will make it better for my workload." We can actually accommodate those requests and again, we capture the value for that. More often than not, the deals are actually larger than what they were when they first were announced. Now, the $100 million funnel, the last part of your question, this is the first time we've actually said something about the total funnel size on an earnings call.
We did that because we felt like, especially with this $7 million deal that we just closed, that has the potential to increase by tens of millions of dollars. We didn't wanna shortchange the way investors really think about our funnel, 'cause previously we'd only talked about tens of millions of dollars on our funnel. Now we're starting to see through these one designs, through the fact that we can upsize these, current designs, and then some of these ones that we're seeing in the nearer term horizon of being able to close being similar magnitude. We really wanted to paint this picture so that people understood, you know, this is not the QuickLogic of five years ago that had, you know, a few tens of millions in the total funnel. This is a much different QuickLogic.
It's a bigger market that we're addressing, and the way we're addressing it is more scalable. The 100 million, I think, is a very real number, based on where we are with these different engagements now.
I see. You know, I guess you showed earlier that SAM as being $1 billion, but you know, how many if it'd be fair to say ASICs or how many integrated circuits are designed every year? Do you have a guess on that?
You know, before I saw that there's 2,000 ASICs designed a year, but that's very dated information.
Okay.
I'd have to go and look at what a newer research report had on that. It's a lot. Actually, there was a period of time where ASICs were kinda going through a dip because they were viewed as, you know, expensive to do, and standard products were becoming available. I think that's kinda going through that renaissance now, where people are really looking at ASICs for more specific workloads. By the way, that is one of the reasons that chiplets, I think, are becoming more interesting again. After they've kind of gone quiet for a couple years. The reason being is because people are wanting to do custom silicon. Gosh, the NRE associated with doing an ASIC every year is just astronomical.
I mean, you kind of have to be an Apple to make it worthwhile economically to do that. The approach of doing it with chiplets sort of breaks apart that problem into smaller, more manageable pieces, and it encourages reuse of chiplets that you've already built. It's kind of like making a new picture with connecting of Legos that already exist versus paying a bunch of money every single year that you wanna do a change. It'll be interesting to see, like, getting back to your ASIC design start question, how many of these in the future will be reuse of existing ASICs in the form of chiplets versus literally brand new monolithic silicon being created.
Yeah, I think, you know, we've talked about this in the past too, that these customers, these companies that are doing the ASICs, they're not typically semiconductor manufacturers.
That's right.
They're leaning on you or they're coming to you to go to full production for them. Maybe if you could describe that process and what the upside is for you.
Yeah, that's another good question. If you're doing a chip design, you can do the design, but in order for you to actually build the chip, you have to work with the supply chain. Typically that would be Amkor, GlobalFoundries, TSMC, those folks of wafer foundry and packaging guys called OSATs. If you're a system company, you probably don't have the operational infrastructure, the supply chain set up to buy direct from those different pieces. You're typically accustomed to just buying a finished good from a distributor like an Avnet or a Future, an Arrow. In order to not have to take the big leap of bringing on your own operations team and establishing relationships with the semiconductor supply chain, what we can actually do is be the storefront.
The storefront is literally just, yes, we can do the IP licensing, yes, we can do design work for the customer, but at the end of the day, we've been building devices for 30 years with the semiconductor supply chain. We can go to TSMC and Global and Amkor. We can procure them, we can do the whole chain of assembling and testing, and then the customer just buys from us a finished good. That's really the definition of that storefront. Because some of these system companies are now wanting custom silicon or silicon that they may have influenced, they don't have the supply chain, then we're gonna make it easy for them to just buy that from us and not have to set up that whole infrastructure.
To date, of the IP contracts we've talked about, we've not said if any of those are actually us being the storefront also or just being the IP partner. We have said on the last earnings call that there are things in that $100 million funnel where we clearly would be that storefront for the chiplet or the final chip. The economic value for the company and for investors is actually significant, because if you imagine an IP business model, we'll get services in the beginning, we'll get, you know, a seven-digit license or a high six-digit license, and then you kinda go silent on the revenue until the customer integrates that and goes to production, then you get royalties over time.
That gap, you know, could be zero revenue from that one customer for a year and a half, right? On the storefront side, we could be doing upfront services, IP license, but as soon as that we start buying from the supply chain and then getting it to the customer, we're gonna be getting revenue. Then by the way, when they start shipping, now you really start to see the divergence because where IP royalty is generally, it's like 100% gross margin, but it's a few % of the total chip price. The device revenue from a storefront, you're getting 100% of the chip price. The gross profit dollars is significantly higher in the case of actually being the storefront versus just the IP on the royalty side. Now, don't get me wrong, we don't complain about royalty. We love royalty.
We're getting royalty on our earliest IP licenses that we were doing years ago, in fact. As far as like top-line growth and really capturing as much as that $1 billion SAM as we can, that's where being a storefront actually comes into play and is quite lucrative from the company.
Okay. How scalable is that or all of this, licensing? Like, you know, it looks like you're just scratching the surface out of the thousands of ASICs that are designed every year. You know, is this your automated enough approach that you can just go to customers and put them into the funnel and, you know, start cranking out devices?
We're finally at that point where we can really turn on the sales team and say, "Go, go at it." For the last couple of years, we've really been, I would say, very cautious in terms of not taking on too much too soon because we really wanted to make sure this automation process was very well tested and thought through. I think we've reached that point now. That's in fact why we recently promoted one of our guys to be VP of sales because that was sort of the moment like, okay, now we're ready to go prime time and go broad. Let's really start building out that sales team accordingly.
Not only did we promote Owen to that, but we've also started to add more sales reps external that can really start driving out into their contacts to grow top of funnel that we can execute on. We feel like we're at that tipping point from a capability point of view to push down on the gas pretty hard.
Okay. I'll turn to the audience if there's anybody has any questions before I move on to the next topic. See if there's some message here. Let's see if it's. Okay, it's not related to this. Yeah. Now, on SensiML. This is, I guess, another tool in the toolbox for, say, a Microchip to offer to their customers is, you know, if you wanna start adding in, machine learning to our processor, you can license. Okay. Maybe explain how that process works.
Yeah. If the big thing today is about edge versus data center or cloud computing, and I think most people agree that it's gonna coexist. The really heavy lifting on AI is gonna be done, especially training, will be done in the cloud, where you have near infinite computing resources, but you don't need real-time. Then when you really wanna get intelligence deployed out at the edge, where it's specific to the unit the AI is resident on, where battery life matters, security matters, intermittent connectivity, all those things, you have this notion of edge AI. So obviously, in the edge, you don't have a lot of computing resources. More often than not, you have a microcontroller and that's it. The microcontroller is probably one of the big microcontroller companies from Silicon Labs or Microchip or Infineon, Cypress, all those guys.
A lot of the push from the microcontroller companies is, how do I enable my customer, the microcontroller customer, to have more intelligence running on the micro at the edge? What does intelligence mean? Well, in the consumer device that we're probably all well aware of, it's saying Alexa, and interacting with Amazon to play music or find the weather. That's an example.
You just shot off everyone's Alexa.
Yeah, exactly. I was hoping mine didn't go off. I have it off. That recognizing your voice is an example of an edge AI. Another example could be, you know, your watch and counting steps from the accelerometer. On a big piece of equipment, it could be attaching a sensor to it so that you know that, wait a minute, the sound and the vibration this machine is making is gonna cause it to break. You wanna shut it off and alert people before that actually happens, and wheels have to roll to fix it. All those algorithms that I was just talking about, those use cases, are running on device. So how do you enable all these different fragmented applications that are very specific in many ways, how do you enable the companies to actually create the AI that runs on the microcontroller?
Well, that's where this whole notion of edge AI software platforms comes in. SensiML is an example of that. It effectively allows people to capture all this sensor data that may make no sense at all and actually create an AI model that you could run on that microcontroller and deploy it. The microcontroller guys obviously see a lot of value in this because their customers are exploring how they do this. We and SensiML wanna make it easy for customers to do that exploration, and then ultimately create the AI model and then go to production with it.
For us, the SensiML folks are focusing really on the microcontroller partners because they have the huge install base already, and they're focusing on them because they have the large sales forces that they can tap into to help sell the value proposition of SensiML. Ultimately, the SensiML business model is a SaaS business model. As customers want to look at their sensor data, create AI models, and try them out, it's a SaaS service that they use from SensiML to go through that process. Once the customer goes to production, it's the same thing like our IP side, it's a royalty. They could use that AI model in the device, in situ, for a royalty on a per unit basis. I think it's still very early days in AI in general.
You see a lot of writing about it in papers and webinars and whatnot, and people are still going through and wrapping their heads around how do I, how do I deploy it on my system? SensiML is there to make that easy, and I think we're starting to see the uptick now through our first six-digit win about a quarter ago, and we said we'll have another one, most likely in hand before the next earnings call in November.
Maybe just when you have a six-digit win, is that over twelve months, or is that an immediate?
Yeah. Usually we talk about for SensiML in terms of 12-month horizon. Similar to the IP side of the business, there's the notion of SaaS subscriptions, which are usually a quarter or a year. Then there are services if there needs to be some help in terms of integrating that into whatever the system is that the customer has. Obviously we're trying to keep it so that it's more SaaS and less service. But that's the business model itself, is to be more SaaS and to look at it typically from an annual point of view.
Okay. Again, if you have questions, use the Q&A on the Zoom screen or firesides@rblt.com. I'll move to your traditional business of FPGAs.
Mm-hmm.
You had said that, you know, the weakness in China, handsets, you know, where is your FPGA fitting in on that? What's the longer-term strategy?
Our FPGA business is most of that in industrial and defense. The good news is that the installed base they tend to buy these devices for literally decades. It's been bouncing around at the level about that for quite some time. The smartphone business for us is with a Japanese OEM in particular. In this quarter they're just going through inventory digestion. You know, the consumer market was hit by, I think, worldwide, during all these inflation issues that have been going on. They're digesting inventory that they've taken from us. The good news, though, is that, you know, I meet with this customer particularly every quarter. I've seen visibility to them using us into 2024.
These they're gonna be new phones that continue to come out with the function that we add in there. That device in particular is a hybrid device of a processor and FPGA. And again, we see visibility into 2024, and I'm hopeful that the revenue will pick back up again after we get through this digestion quarter.
Are there still new designs happening with your?
Yeah. Absolutely. There are.
Meaning you're not your product being designed in, but do you have a new product roadmap?
We do. We, again, started to lay some breadcrumbs around that, in the context of chiplets and talking about what we're doing with Eliyan and some of the presentations that I've made with the Open Compute Project. I think that there's definitely a need for an FPGA-based chiplet, and we are working with customers now, sort of jointly defining what that would look like. Then there's some other things that we haven't talked about publicly that we will at the right time that do talk about chip roadmap, not just IP roadmap, but that's very much in our sights and our priorities right now.
Okay. For a long time, for as long as I've known QuickLogic, that the feature of your FPGAs is super low power.
Mm-hmm.
Relative to everyone else.
Yeah. We were very purposeful in targeting low power. We would actually do things at the design level. We would make engineering trade-offs to ensure that we were lowest power for standby and for dynamic. The interesting thing about being in the IP business is that we don't wanna limit ourselves to low power. It's good to say that we're the best at something, but if there's a bigger market out there, if we do the other trade-off and get more performance and less power, then we're gonna do that. This whole automated approach of the Australis actually lends itself to that. We are seeing some opportunities now in more higher performance computing applications that really don't care as much about power, and they care more about megahertz. We're gonna go down that path too.
It doesn't change the fact that we can do low power. It just means we want to address both markets as opposed to only one market.
Maybe I'll bring Elias into the conversation. You know, with these changes in, you know, these three legs of your stool for driving revenue, seems like the margins are gonna be expanding. Do you have a target model yet for, you know, this new business?
We do. We have an internal target of getting to 70% gross margin. That's our goal. We've had some lumpy gross margins here with 60-some%, and we targeted 64% for Q2, but we came in at 58%. Certain classifications need to be worked out with this new kind of business model. I think going forward, you're gonna see our target kinda raised up to the 60s. If I can get to mid-range to 70%, then I would have met the goal. Yes.
Okay. How's the balance sheet or how's it? You know, as you get to profitability, I think Brian said by the end of this year.
Yeah. We were very happy with where we got to in Q2. We, you know, we almost did it. Still came in at an EPS of zero. Our goal is to get to profitability, not break even. The path is there. I think in Q4, we should see some profitability, grow the balance sheet, but also, as you know, as part of good housekeeping or financial responsibility housekeeping, you know, we did announce we're filing an S-3, a shelf registration, to show the strength of the company and our belief that we are the right market to expand the business. I think all those with the fact that we have no debt in the company is also a plus for our balance sheet.
Yeah. Good. We did get a question from the audience on the FPGA that, you know, it's unusual that you'd be in a smartphone with an FPGA. Maybe and on to Brian, when we met, I know we had that discussion that smartphones is a tough business because they squeeze every penny out of the design. But you're hanging in there in the smartphone market. What's the reasons and, you know, what's the thought? What's the opportunities going forward?
Yeah. The way I look at the smartphone market, firstly, I agree in general, FPGA is not something you would normally see in a smartphone. To be really clear, if we go back to my first slide where we talked about the different products, the one that's being used by the smartphone customer is the SoC product, which has a processor in it, plus a little FPGA. So the FPGA is a core. It's not really the whole chip. And I think that probably makes it, well, I know it makes it easier from a cost and power point of view to actually be used in volume in a smartphone. That's that from a technology point of view.
The use cases for this particular customer is that this customer uses Qualcomm, they use MediaTek, depending on all the different phones that they sell every year. It made sense from an architecture point of view to have a chip like ours in there that could be used and then changed depending on which phone architecture it was being deployed in, which processor was the companion. They have a lot of different varieties of phones from kids phones to older phones to low-end phones to high-end phones. This company had their own sensor algorithms that they wanted to use in deploying those phones. They really liked the fact that we had a processor and an FPGA for them to do architecture trade-offs and determine what made the most sense from a power point of view.
Ultimately, they really wanted to go with us because we helped them architecturally be agnostic to the processor and do it at low power because smartphones, obviously, battery life is a big care about from the consumer. That was why they use us, how they use us. I think going forward, our view is that smartphone business is good. We like it. We'll take being used into 2024, but a lot of the things that we're doing now on the IP side, on the SensiML side, on the potential to do chiplets that are more FPGA-based, the upside potential there is substantially higher than just chasing the smartphone business.
We don't have a plan to do a next generation chip for that in the smartphones because we have our sights set on something much bigger, like add a zero or two to it, rather than just stay in the smartphone space.
Right. Think of you as focused on the eFPGA storefront. It all sounds like a great opportunity.
Yeah.
Well, thanks for educating us today, and thanks for joining us at the conference.
It's been fun.
Thank you, everyone, for.
Thanks for hosting.
For coming.