Good afternoon and welcome to eMemory's third quarter 2024 webcast investor conference. Joining us today is our Chairman, Dr. Charles Hsu, President Mr. Michael Ho, Head of IR, Ms. Li-Jing Chen, and the Director of the Finance Department, Ms. Teresa Kuo. The format of today's event will be as follows. First, eMemory's Chairman, Dr. Charles Hsu, will give an opening remark. Afterwards, President Mr. Michael Ho will summarize our operations, followed by our business outlook. Next, Dr. Charles Hsu will give a talk titled eMemory Enables HPC, which is High Performance Computing in AI Applications. Then we will conclude today's conference with a Q and A session where our management team will answer your questions. Please feel free to submit your questions in the input box on the webcast window throughout the conference.
As a reminder, this conference is being recorded and a webcast replay will be available after the conference is finished. For more information, please visit the company's website under the Investor Relations section. As usual, before we begin, we would like to remind everyone that today's presentation may contain forward-looking statements subject to the risk factors associated with the semiconductor and IP business. Please refer to the cautionary statement on page three of today's presentation. Now I would like to give the floor over to eMemory's chairman, Dr. Charles Hsu.
Good afternoon everyone. Thank you for attending our conference call today. In October we reached a significant milestone by successfully completing our first 3-nanometer customer license project. The licensee, a global leader in CPU IP with applications in cloud data centers, has already begun collaboration with us on the CPU platform, making a major step forward for us. Our collaboration with Siemens on SRAM repair is also progressing very well. Siemens Tessent Memory BIST tool holds a strong market share, and as AI chips require increasingly dense SRAM, managing error in advanced processes is becoming more challenging.
Traditional e-fuses typically suitable for densities below 4K-bit can no longer meet the density requirement for memory repair, and the OTP density can be larger than several hundred K bits to a few megabits, which is needed for the large density SRAM repair, and our partnership with Siemens will accelerate adoption among HPC customers seeking enhanced repair capability for SRAM. As we mentioned previously, our technology development has advanced to 2-nanometer, and chip design integration is underway at 3-nanometer. With successful design wins at 5-nanometer, 6-nanometer, 7, 12 and 16-nanometer entering mass production. Along with the growing demands for security IPs in advanced process, we see substantial growth potential ahead, and we remain highly confident in our future. Next, I would like to invite our President Michael Ho to share our third quarter performance and future outlook. Michael.
Okay, thank you, Charles. Good afternoon everyone. Now let's begin with our 2024 third quarter financial results. The third quarter revenue was NTD 899 million, up 0.7% sequentially and up 14.3% year over year. Operating expenses was NTD 395 million, down 0.8% sequentially but up 6.7% year over year. Operating income was NTD 505 million with an increase of 2% sequentially and an increase of 21% year over year. Operating margin increased by 0.6 percentage points sequentially and increased by 3.1 percentage points year over year to 56.1%. Our net income amounting to NTD 414 million experienced a decrease of 12.9% sequentially but increased 2% year over year. EPS for the quarter was 5.54 NTD and ROE was 54.6%. Next, let's move on to the revenue contribution by licensing and royalty.
Licensing in the third quarter accounted for 32.3% of the total revenue, down 3% sequentially but up 12.2% year over year. Royalties in the third quarter contribute 67.7% of the total revenue, increasing 2.6% sequentially and increasing 15.3% year over year. Total revenue of the third quarter increased by 0.7% compared to the previous quarter and increased by 14.3% compared to the previous year. For the first three quarters of 2024, the licensing and royalties revenues are as follows. Licensing in the first three quarters accounted for 31.5% of the total revenue, up 25.6% year over year. Royalties in the first three quarters contribute 68.5% of the total revenue, increasing 18.5% year over year. Total revenue for the first three quarters increased by 20.6% compared to the previous year. With that, I will comment on our revenue contribution by specific IPs.
NeoBit accounted for 31.2% of total licensing revenue in the third quarter, increasing 23.2% sequentially and increasing 27.8% year over year. Its royalties accounted for 26% of total royalties, down 0.1% sequentially but up 35.5% year over year. NeoFuse accounted for 30.9% of total licensing revenue in the 3rd quarter, down 10.1% sequentially and down 9.7% year over year. In terms of total royalty revenue NeoFuse's royalties increased by 4% sequentially and increased by 9.1% year over year accounting for 71.5% of total royalties. PUF-based security IPs contributed 12% of licensing revenue, decreasing 6.5% sequentially and decreasing 39% year over year while its royalty accounted for less than 1% of total royalties. MTP technology accounted for 25.9% of total licensing revenue, down 15.3% sequentially but up 139.5% year over year.
Royalty from MTP decreased 7% sequentially but increased 25% year over year, accounting for 2.5% of total royalties for the first three quarters of 2024. The revenue by technologies are as follows. NeoBit licensing revenue increased 36.3% year over year and royalty increased 11%, accounted for 25.8% of the total revenue. NeoFuse's licensing revenue increased 9.2% and royalty increased 20.4% year over year, contributing to 61% of the total revenue. PUF-based security IP's licensing revenue decreased 10.6% year over year while the royalty contribution was less than 1%, accounted for 3.5% of total revenue. We expect the PUF-based revenue to significantly increase in Q4. MTP technology licensing revenue increased 85.5% year over year and royalty revenue increased 55%, accounted for 9.7% of total revenue. Now let's look at the royalties for 8-inch and 12-inch wafers.
8-inch wafers accounted for 40.9% of royalties, down 1.2% sequentially but up 30% year over year. 12-inch wafers contribute 59.1% of royalties increasing 5.5% sequentially and up 7% year over year. In total 179 tape-outs were completed in the third quarter. We will provide more information in the management report. In the next section I will address our future outlook for licensing revenues. Licensing revenue will continue its growth momentum due to the strong demands from both foundries and chip companies for royalty revenues. We expect the royalty will continue its growth momentum as accumulated tape-outs in 16, 12, 7 and 6 nm enter the production stage along with the continued market share gains in the mature applications. Let's move on to the new IP technology and business development for new IP technologies. 1.
NeoFuse and NeoPUF were successfully verified in the N3P process with design-in and evaluation cases ongoing. 2. NeoMTP for the four-color ESL and e-paper display driver has been successfully verified in customers' products and will soon ramp up. 3. We are developing the 2-nanometer technologies with the leading foundries about the business development platform. 1. The CPU architecture for security IP is expected to start contributing to revenue. 2. eMemory and Siemens are offering a groundbreaking SRAM repair toolset that integrates Siemens Tessent Memory BIST software with in-memory NeoFuse OTP. 3. PUFrt security is collaborating with Arm on the PSA Certified Root of Trust Component Level 3 certification for its crypto coprocessor, providing a robust security ecosystem essential for the AIoT era. This concludes my comments. Next I will pass it over to Charles. Thank you.
Okay, in the following section I would like to talk about how eMemory can enable HPC in AI applications for high density because high density SRAM plays a crucial role in AI accelerators. However, increasing SRAM density brings challenges. Today we will explore how eMemory's NeoFuse OTP integrated with such as Siemens Tessent tools provides a high-yield cost-effective solution to repair SRAM memories in AI applications. The AI accelerator plays a crucial role in enabling faster model training, quicker predictions and also more efficient application performance. High density SRAM is particularly important in AI accelerators to help them work faster and use less power, especially in three key areas. One is in the buffer memory and the second is for the AI model training and the third is the computing in memory. We call it CIM for inference.
In buffer memory which is a high speed storage between the different processing stages, high density SRAM acts as holding space for data in AI accelerators to ensure that everything runs smoothly. It functions like a large fast flowing funnel, temporarily storing and quickly passing data to different parts of the accelerator. With high density SRAM, the buffer memory can handle a large amount of data without slowing down while maintaining efficiency in power and speed during the data transfers and during AI model training where substantial data processing is required as the model learns, high density SRAM serves as a large and fast work space. This allows the AI accelerator to access data quickly to speed up the training and handling multiple data in parallel without compromising training time.
Furthermore, the high density of SRAM provides enough on-chip storage to store large data sets directly and minimizing the needs for the slower external memory, and lastly in computing in memory for inference where the AI model generates predictions and high density SRAMs allows the AI accelerator to do quick calculation directly within the memory instead of moving data to separate processors. With everything happening in one place, the AI model can make prediction quickly, which is important for tasks that need real time responses such as voice recognition, and furthermore, by reducing data movement, high density SRAM can enhance power efficiency. As I discussed in my talk last year, increasing the density of SRAM memory leads to a decrease in yield as the technology scales to a smaller dimension.
However, eMemory's OTP can help repair defects in SRAM memory enabling higher yields and to refresh your memory. SRAM repair involves storing the location of defect memory cells on OTP and enabling redundant memory cells already present in SRAM to replace the faulty memories and repair fields. OTP is ideal for this purpose due to its smaller cell compared to eFuse and making it particularly advantageous for high density SRAM repair and where high density OTP is needed. Additionally, NeoFuse OTP is flexible enough to support various memory form factors such as 3D or multi-chip packages and ensure high yield during production. The eMemory provides OTP with an interface for Siemens. We call it a memory built-in self-test. By integrating eMemory OTP technology with Siemens Tessent tool we achieve more efficient SRAM repairs than conventional method and to achieve optimal SRAM repair.
The Tessent Memory Built-In Self-Test controller is used to test the memory and after testing the built-in redundancy analysis module, analyze the defect bits and calculates the necessary repair information. This information is then transferred to SRAM repair ports and built-in self-repair registers and the repair information is then sent to the Tessent Memory Built-In Self-Repair controller and where it is written onto eMemory's NeoFuse OTP through our interface. So during device power up the Tessent tool reads the repair data from OTP and loaded into the built-in self-repair registers and this process instructs the SRAM controller to replace the defective bad bit with the redundant bits already in the SRAM.
By combining eMemory's OTP with Siemens' tool, we can achieve high repair density and flexibility across any form factor of SRAM and using pre-integrated and verified solution that is simple to adopt. This not only reduces integration cost but also minimizes the cost associated with the yield loss. The Memory BIST tool is groundbreaking in its ability to quickly repair AI accelerator even after they have been integrated onto the system. Initially the memory testing analysis and the repair relied on the manual processes and specialized equipment which had to be completed during the testing phase and this means that once the system was deployed in the field such as in expensive AI servers, automotive and more memory repair could not be performed after leaving the testing machine.
But with MBIST memory built-in self-test and memory built-in self-repair, in-system repair becomes possible. By automating testing analysis and the repair memory built-in self-test not only save time, cost and also resources but also overcome the bandwidth limitation of external memory testing tool. More importantly in-system repair techniques can be applied to multiple chip stack like chiplet architectures or up to system packages and which will ensure reliability and the functionality post packaging and the chiplet typically contain a large amount of SRAM required by the processing which means high density OTP is needed for effective repair and this approach is very suitable for AI accelerator and which often had a more complex design and they require faster and more efficient repair.
And in addition to the SRAM repair, the integrated OTP is also needed for replacing ROM to store boot codes when the AI system boots up and also the OTP can also be used in this integrated IP to store the secret key and the unique ID which are required in AI system to protect the training data and the AI model and the output data. Therefore, eMemory's OTP can enable AI by supporting high speed SRAM repair as well as storing boot codes and the root key and also unique ID for the root of trust in the security functions. With AI booming, we foresee that our business will continue to grow over the long period and this concludes my lecture. Thank you very much for your time and next we will enter the Q&A session.
Thank you Charles. This concludes our prepared statement. We will now begin the Q and A session. Please submit your questions in the input box on the webcast window. All of our questions will follow the format of answering the Chinese version first followed by the English version. We will now collect the questions and begin our Q and A session.
[Foreign lunguage] Zali.
Self-test automation, the self-test interface.
The question was related to Charles's lecture just now. You recently issued a press release announcing the collaboration with Siemens to launch an SRAM repair tool. Typically your IP is utilized by foundries and applied to chip customers. Why was it necessary to partner with an EDA company for this release?
This question's for Charles.
So EDA companies offer built-in self-test functionality for the SRAM blocks. Through our collaboration with EDA companies, we have developed OTP with an appropriate interface that integrate seamlessly into EDA tools, making OTP repair more user-friendly so with Siemens' built-in self-test holding over 90% of the market share, our partnership with Siemens represents a very powerful alliance.
What factors have contributed to the ongoing growth of your operating profit margin? As you develop more IPs and licensing revenue increase each quarter, will there be a need to expand your R and D team? Michael.
Our technology model is unique in that we license our technologies to foundries making their process platforms also our technology platforms. Globally, more than 25 foundries have licensed our technology and we have established a total more than 600 process platform ranging from the 0.35 micrometer to 3 nanometer, including the OTP PUF, MTP, EE, SRAM, PROM, Flash and ReRAM. Each year we added more than 50 new process platforms worldwide achieving over 600 tape-out annually. We collect the royalties as these chips enter the mass production. Because of our unique business model, over 80% of our revenue comes from the royalties from the accumulated products entering the production and licensing our existing library which required a minimum R and D resources. This allows us to focus our research and development on creating new technologies and platforms as we continue to 1. License more technology to foundries 2.
License more IPs to fabless companies. 3. Innovate more application IPs. These efforts will drive substantive business and profit growth. In terms of talent, we can maintain our current headcount to support the expansion of existing foundry technologies. However, we still need new talent to develop the IPs in areas like security systems which require specific expertise. We hire a small group of innovative experts to develop these core technologies rather than engage in the design service. Even when we increase our headcount, we will do so gradually rather than through the rapid expansion over a short period. Thank you.
Several ASIC companies in Taiwan have recently downgraded their revenue outlooks. Has eMemory's business been affected by the current economic environment and if not, what is the reason? Can Michael answer this question?
As mentioned earlier, we have a unique business model, deep technology expertise, extensive technology platform coverage and IP applications that span nearly every chip domain. Furthermore, our IPs have a 100% retention rate, meaning that once customers adopt our technology, they continue to use it across the subsequent product generation. We developed our technology from the fundamental transistor level with the patent protection of the IPs making it impossible for competitors to replicate in this field. We hold a leading position and are well ahead of our competitors, which means we are not subject to the price competition. Thank you. Security processor.
The question was, how do you maintain your leading position against competitors? Michael.
As mentioned in the previous question, our competitive edge stems from the collaboration with foundries to build our technology platforms and licensing our technology to fabless companies for use at these foundries. To stay ahead of our competitors, we 1. continuously establish our technology on the foundry's new process platform 2. continuously develop the IPs that the fabless companies need for each technology 3. continuously integrate new IPs to offer fabless customers better functionalities such as security IPs from the root of trust to the security processors. Only through the continuous innovation, widespread platform deployment and accelerating progress we can maintain our leading position and prevent the competitors from catching up. Thank you.
Do you currently have any customers who have already adopted your IPs for SRAM repair?
Yes, there are three companies have already adopted our IP and all are developing AI SoC in advanced processes. Does security IP secure the interface? So it's.
So this question is a question that everyone's interested about. So it's what's the current status of your collaboration with Arm? How will it impact your future operations? Has there been any business progress so far and will it contribute to this and next year's licensing fees and royalties? Can Charles please answer this question?
Our collaboration with Arm mainly focuses on the hardware security in terms of PUF-based security. We have outlined a roadmap to continuously enhance the security level and also introduce the new security functions which are also needed in all of Arm's applications. In our partnership with Arm we jointly promote IP to customers, we license it to Arm, all their customers on the advanced platforms and we also conduct educational outreach together and co-develop and integrate new IP to meet the higher security requirements and all these efforts are ongoing and our licensing and royalties will increase as the customers adopt our IP in more products and enter mass productions.
Ding Wei, TCAM ISP connectivity SSD controller.
As of quarter three, the cumulative revenue grew by 20.63% year over year. What IP licenses, end products, applications or process nodes have driven the growth in licensing revenue? Also, what type of IP chip applications and process nodes were the main contributors to royalty revenue growth? Michael.
Regarding the licensed fees, MTP related have shown the highest annual growth with nearly 86% year over year growth. The increase was mainly driven by the application in the DDR5 like SPD and PMIC for color, ESL, ePaper and system PMIC primarily in the mature process nodes. There are also several projects in the advanced process nodes which has a higher unit price and will contribute significantly as well. In terms of the royalties, the 28 and 22 nanometer nodes contribute the most including the application like OLED, DDI, T-Con, ISP connectivity and SSD controller and more with a wide range of applications and over 380 NTD today. We expect a significant growth next year. Our technology known like 16, 12, 7 and 6 nanometer applications including the security IPs will also gradually enter the production after the tape-out.
Given the low base period, the growth rate and the potential will be significant in the future. Thank you .
What is your outlook for next year's performance and what are the main drivers of growth? Michael.
Regarding license fees, the progress in advanced process will accelerate due to the broader range of product lines, more technology nodes and more foundry process platforms available to customers along with the Arm and Siemens collaboration platforms. As a result, both license fees and royalties will be much higher than before. We are very confident about the future growth. Thank you.
Currently the semiconductor industry is experiencing strong demand for advanced processes while the demand for mature processes is slowing down. Will this trend continue on to next year and how will this impact your performance? Can Michael please answer this question?
In terms of licensing and royalties this year we have seen year over year growth in the NeoBit, OTP and MTP indicating that the demand for our products in mature process nodes remains strong. Although the utilization rate of some foundries in mature process are not as high as before, the global expansion of capacity in the mature process means that overall demand in this area will continue to grow for us. Thank you.
We see that many high demand chips in the market such as CIS, ISP, OLED, etc., high speed ICs, PMIC, DTV, RF switch, all of them are increasingly being developed using more advanced processes or FinFET technology. How will this trend affect your company's business? Can Michael please answer this question?
These application ICs driven by the demand for more functions, higher speed, lower power consumption and reduced cost will continue to move toward more advanced process and even the FinFET process. This is a very favorable development for us because it means the IC chips will become larger, wafer consumption will increase and both our IP and the unit price of foundry wafers will be higher in advanced process. All these factors will drive the continuous growth in our royalties and the licensing fees. Thank you.
Just rule of charts, okay.
Cloud service provider providing the data center like providing the data the chu chun fengxi providing AI model. Data center for the data center. OTP. Root of Trust data center security.
Since CalyptrA is an open standard, who might play a role in enforcing its adoption? What are the key motivations for customers to implement it? Can Charles please answer this question?
The CalyptrA standard primarily establishes security requirement for data centers largely driven by cloud service providers. Cloud service provider offers a data center for data storage, analysis and services such as AI model training and more customers using data center services on their data to be securely protected, analyzed and deliver outcomes. For any device to access cloud based data centers, they must comply with CalyptrA standard which require a PUF for the generating unique id, require a TRNG for random number generations and also OTP for private key storage. Our PUFrt IP integrates all three which are PUF, OTP and the TRNG to create a root of trust and meeting the security needs for the data center applications and with customer demand for PUFrt steadily increasing.
The Edge device.
Edge device root of trust. Data center.
According to CalyptrA's documentation, the goal is for confidential computing to first adopt CalyptrA with later plans to expand to all chip types. Is this a primarily data center driven opportunity or is it expected to extend significantly into edge AI applications as well? Can Charles answer this question?
CalyptrA's initial focus was indeed on the data center applications. However, as AI processing shifted toward the edge such as in IoT sensors, autonomous vehicles and the smart devices, the Root of Trust become equally crucial. So for the hardware Root of Trust enable secure authentication when the device communicates with data centers, ensuring that only verified data and devices can interact with the central systems. So establishing Root of Trust at both the data center and the edge level enhances security and integrity across the entire ecosystem from the data generation at the edge to cloud processing and the storage and this approach strengthen overall network protections, making data transmission and processing more reliable and secure.
In the interest of time, we will now ask our last question.
Trump has just been elected as a U.S. President and publicly stated that Taiwan's semiconductor industry should pay protection fees to the U.S. if import tariffs are imposed on the semiconductor chips produced in Taiwan. Will this affect your company? Michael.
We are an IP business so we don't manufacture end product chips. Instead, our model is based on the collecting licensing fees and royalties from the foundries and chip companies which are not subject to the tariffs. In addition, our IP is licensed to foundries globally, including the U.S.-based foundries such as Intel and GlobalFoundries as well as other companies with the facilities in the U.S. thanks to our global platform coverage and the diverse technology process, we are less susceptible to the political impacts. Thank you, thank you.
We will now begin the closing comment. Charles, please proceed.
Okay, so for more information about the PUF-based security IP and the technologies and also about eMemory technology, we encourage you to visit our website and check out our articles and other materials. And thank you again for your patience and support for eMemory. We will continue to work hard on technology and IP innovation and PUF-based hardware security solutions for our customers and bring higher returns for our shareholders. Thank you.
Thank you. Ladies and gentlemen, please be advised that the conference recording will be accessible within the next three hours. Thank you, everyone, for joining us today. We hope you will join us again next quarter. You may now disconnect. Goodbye and have a good day.