Good afternoon, everyone. Welcome to eMemory's Fourth Quarter 2025 Webcast Investor Conference. Joining us today is our Chairman, Dr. Charles Hsu, President, Mr. Michael Ho, Head of IR, Mr. Li- Jeng Chen, and Director of the Finance Department, Mr. Joseph Hsia. The format of today's event will be as follows. First, eMemory's Chairman, Dr. Charles Hsu, will give an opening remark. Afterwards, our Financial Officer, Mr. Joseph Hsia, will present a review of our financial results. Following that, President, Mr. Michael Ho, will share our business outlook. Next, Dr. Charles Hsu will give a talk titled, "eMemory's Technology Enables AI Memory Systems to Be High-Yield, Reliable, and Secure." Then we will conclude today's conference with a Q&A section where our management team will answer your questions. Please feel free to submit your questions in the input box on the webcast window throughout the conference.
As a reminder, this conference is being recorded, and a webcast replay will be available after the conference is finished. For more information, please visit the company's website under the Investor Relations section. As usual, before we begin, we would like to remind everyone that today's presentation may contain forward-looking statements subject to risk factors associated with the semiconductor and IP business. Please refer to the cautionary statement on page three of today's presentation. Now, I would like to give the floor over to eMemory's Chairman, Dr. Charles Hsu.
Okay, good afternoon, everyone. Looking back at the fourth quarter of last year, we achieved an impressive milestone with 18 licensing wins in the 3 nm defense application. In the first quarter of this year, we expect to secure an additional 3 nm license related to AI data center processors. As this license progresses, our PUF, Physical Unclonable Function, royalties have moved into mass production, most notably with our PUF RT, which is a Root of Trust, now integrated into the NVIDIA Vera Rubin’s architecture, and we expect royalty contribution to grow significantly in the second half of the year. The era of AI inference is transforming our industry. We are seeing a surge in SRAM repair demand driven by Computing- in-M emory, alongside an urgent need for security in edge AI and Physical AI.
Looking further ahead, Google and IBM anticipate that quantum computing will be commercialized within five years as governments worldwide pivot toward post-quantum cryptography (PQC). We are entering the most significant hardware security upgrade in 25 years. We are uniquely prepared for this shift. Our foundation is built on proven track record over 130 PUF-related tape out today. And also global reach of our technology more than 700 process platforms worldwide mass-producing wafers utilizing our technology. And also our production is already a massive volume and the annual production record exceeding 9.8 million wafers 8 in equivalent. So this solid foundation is almost irrepressible advantage as we integrate PUF into the global chip supply chain and establish a definitive hardware Root of Trust. We remain profoundly confident in the company's future.
Next, I would like to invite our Financial Officer, Joseph Hsia, to present our fourth quarter performance afterward. Our President, Michael Ho, will share our future outlook. Thank you.
Hey, good afternoon, everyone. Now allow me to briefly go through our 2025 fourth quarter financial results. Our fourth quarter revenue was TWD 1.05 billion, up 10.1% sequentially and up 3.7% year-over-year. Our operating expenses for the fourth quarter was TWD 413 million, increased 2.1% sequentially but down 7.2% year-over-year. Through ongoing org and process optimization as well as AI transformation, we were able to improve our operational efficiency, and that led to our overall expenses remaining broadly flat despite continued business expansion. In result, our operating income was TWD 636 million, with an increase of 15.9% compared to the previous quarter and an increase of 12.3% year-over-year. Operating margin increased by 3 percentage points sequentially and increased by 4.6 percentage points year-over-year to 60.6%, reaching a record high reflecting discipline, cost control, and improved cost efficiency.
Our net income amounting to $563 million, up 15.6% quarter-over-quarter and 9.4% year-over-year. EPS Q4 of 2025 was $7.54. Next, let's move on to revenue breakdown by licensing and royalty. Licensing in the fourth quarter accounted for 33.1% of our total revenue, down 0.1% sequentially but up 9.9% year-over-year. Royalties in the fourth quarter contributed 66.9% of the total revenue, increasing 15.9% sequentially and increasing 0.9% year-over-year. For the full year of 2025, licensing increased 10.4% year-over-year, and royalties increased 5.1% worldwide. With that, I will comment further on our revenue contributions by specific IPs. First of all, NeoBit, it accounted for 22.5% of the total revenue in the fourth quarter. Its licensing decreased 25.5% sequentially but increased 16.5% year-over-year, while royalty revenue increased 3.6% sequentially but decreased 7.9% year-over-year.
Second, it is our NeoFuse Technology. NeoFuse accounted for 58.5% of our total revenue in the first quarter. Its licensing revenue decreased 22.1% sequentially and 23% year-over-year, while royalty revenue increased 20.3% sequentially and 2.1% year-over-year. For PUF-based security IPs, it contributed 10.2% of our total revenue in the fourth quarter, mainly driven by licensing. Licensing revenue increased 91.7% sequentially and 45.5% year-over-year, while royalty revenue accounted for less than 1% of the total royalties. Lastly, for MTP Technology, it accounted for 8.8% of our total revenue in the fourth quarter. Licensing revenue increased 4.7% sequentially and 29.8% year-over-year, while royalty revenue increased 13.6% sequentially and 49.9% year-over-year. For the entire year of 2025, NeoBit licensing revenue increased by 16.1% year-over-year, and royalty increased by 2.5%.
For NeoFuse, the licensing revenue increased by 0.7%, and royalty increased by 5.2% year-over-year. For PUF-based security IPs, the licensing revenue increased by 37.4% year-over-year. Lastly, for NeoMTP, the licensing revenue increased by 3.6%, and royalty increased by 21.7% year-over-year. Digging a little bit further into royalties breakdown by 8 in and 12 in wafers, for 8 in wafers, it accounted for 36.2% of our royalties, up 3.3% sequentially but down 10.5% year-over-year. For 12 in wafers, it contributed 63.8% of our royalties, up 24.5% sequentially and up 8.8% year-over-year. A total of 201 product tape-outs were completed in the fourth quarter, and we will provide more information regarding that in our management report. Next, I would like to pass the floor to our President, Michael Ho, to share more about our future outlook. Thank you.
Thank you, Joseph. Good afternoon, everyone. In the following section, I will address our future outlook. For licensing revenue, we expect to continue growth, strong growth, driven by increase in both the number of license and the average license price across our country and fabless customers. For royalties, growth is accelerating, driven by the ramp-up of mass production across various applications, higher ASP from the advanced nodes, additional PUF-related royalties, and higher royalty rates from the MTP-related IPs. New application ramp-up include Mobile: RFICs for U.S.-based smartphone modem platforms. Automotive: ADAS, networking-related applications, ISP, and LIDAR. Cloud AI: BMC, SSD controllers, networking-related applications, CXL controllers, and DIMMs. E dge and Endpoint: Embedded controller for notebook and PCs, as well as security application for various smart devices, including printer cartridges, using the embedded PUF for anti-counterfeiting.
IP and Security Platforms: 1, OTP: Advanced GAA OTP IP development with leading foundries, extending towards sub-3 nm nodes. R RAM: Embedded RRAM platform with key foundries and IDMs for Fintech, BCD, and IoT-automotive applications. NeoFlash: Deployment across foundries for BCD and mixed-signal process in 12 in fabs. S ecurity IP: PUF PQC, achieve NIST FIPS 205 and SP 800-208 certification, reaching a milestone in comprehensive post-quantum cryptography protection. For Security Ecosystem Expansion: Chiplet Security, end-to-end authentication, and supply chain trust for advanced packaging. CPU platform collaboration: PUF-based Security Root of Trust integrated with major CPU platforms. A utomotive and healthcare: PUF-based HSM servers, supporting secure OTA and privacy protection. This concludes my comments. Next, I will pass the time to Charles. Thank you.
Okay, so let's watch video first.
We often hear about artificial intelligence, AI, but what does it really mean? AI is built on two core processes: training and inference. Training builds the model; inference runs it in real time to make decisions. As AI enters everyday products, inference becomes the dominant workload. Inference depends on constant, fast memory access. If memory is slow, performance stalls. That's why many well-organized SRAMs place close to compute, and achieving high bandwidth is essential for efficient AI inference. But speed alone is not enough; reliability matters. If SRAM fails, data must be retried, rerouted, or repaired, slowing systems and creating risk. From stalled robots to autonomous driving and AI-assisted surgery, healthy memory is critical for safe AI. For years, eFuses was the standard SRAM repair solution, but AI inference has outgrown eFuses. High current, routing congestion, large area, and limited repair capacity make eFuses unsuitable for modern AI chips.
While eFuse supports only tens of kilobits, today's AI needs repair data at almost 100 times of that, at megabit scale. Together with Siemens, eMemory's NeoFuse one-time programmable OTP memory delivers an effective SRAM repair architecture. eMemory's NeoFuse OTP stores repair information at high capacity and with high reliability. Tessent detects SRAM faults, computes for optimal repair approaches, and then applies data remapping to repair. Adding a FuseBox interface enables crosstalk between NeoFuse and Tessent. Mechanistically, a two-phase validation approach maximizes SRAM yield. For phase I, NeoFuse OTP self-repairs to remain 100% defect-free. For phase II, Tessent analyzes the SRAM array and assigns redundancy to defective cells. This creates a scalable, automated flow that keeps large SRAM arrays healthy and inference-ready.
With a significantly smaller footprint and true-in-field repair, we have built a reliable foundation for production-scale AI. Longer chip lifetimes, fewer AI interruptions, our solution is built for real-world applications.
eMemory and PUF Security, your most trusted semiconductor IP company for NVM and Security Solutions.
Okay, so, as you can have seen in the video, this is just one clear example of how our IP can power AI in reliable and efficient manners, and particularly to overcome current pain points encountered by using current technology such as eFuses for AI implementations. Thus, to follow, I would like to present to you a more comprehensive view of eMemory's technologies and how we can enhance reliability and security across various memory architectures. In today's AI-driven world, memory systems face three critical challenges: achieving high yield at the advanced node process nodes, ensuring reliability under a streaming workload, and maintaining robust security. eMemory addresses all three through our innovative logic NVM and the PUF-based Security Solutions. Let me walk you through how our technology enables the AI memory ecosystem from on-package memory all the way to system-level storage.
As the heart of eMemory is our logic NVM technology, that is, non-volatile memory built using standard logic fabrication processes. First, one-time programmable memory—we call it OTP. This includes our NeoBit mainly on 8 in wafers for mature nodes, and the NeoFuse on 12 in wafers mainly for both mature and also advanced nodes. And OTP is a programmable once and cannot be altered, perfect for storing permanent data. And the second is multiple-time programmable memory, which is MTP. Our NeoEE, NeoMTP, and the NeoMTP solutions allow reprogramming multiple times, offering flexibility for firmware updates and also configuration changes. And the third is Flash memory, with our NeoRRAM and the NeoFlash product, providing the highest rewrite endurance for cold storage and executions. Together, they can be used in a wide range of critical applications.
For instance, we use OTP to repair defective memory cells in DRAM and SRAM, restore 40 pixels in image sensor and trim analog circuit to meet specifications. This directly translates to higher manufacturing yield and lower cost. And for MTP and Flash, which enable on-chip cold storage and also execution, eliminating dependency on external memory. They also support product version control and post-manufacturing customizations. And for security applications, OTP provides the foundation for storing unalterable hardware keys, the Root of Trust for any secure systems. Once programmed, these keys cannot be modified, even by sophisticated attacks. And compared to traditional non-volatile memory, logic non-volatile memory possesses several advantages. In terms of manufacturing complexity, traditional NVM require 10 or more additional masks beyond the standard logic process. That is more than tens of extra manufacturing steps.
Our logic NVM, no additional mask needed, which makes it attractively dramatically simple process. Those extra process steps in traditional NVM also mean longer manufacturing cycle and significantly higher cost. Our logic NVM uses the same equipment, comparable process flow, resulting in substantially lower cost. For complexity, processing result in lower yield, the traditional NVM suffers from this. The logic NVM built on mature standard logic process typically maintains high yield even at the advanced nodes. A shorter development cycle is also a major advantage of logic NVM. Traditional NVM requires the development of a new transistor model, extensive R&D, and lengthy testing before deployment. But the logic NVM uses existing logic process and the model, which can be integrated and deployed rapidly without reinventing the wheel. For the scalability is also critical for future implementation.
The traditional NVM has limited expansion capacity due to requirement of new equipment, investments. However, logic NVM is highly expandable, no new equipment needed due to its logic process, compatibilities. So we have noticed major chip manufacturers increase in the adopting logic NVM, and it is not just because it is better. It is also economically essential at the advanced process nodes. Okay, now let me introduce our second core technology, which is PUF-based hardware security. PUF stands for Physically Unclonable Functions, and in fact, our anti-fuse PUF, NeoPUF, was developed from our OTP and serves as the foundation of our security IP solutions. Thinking of PUF as silicon fingerprint, just as no two human fingerprints are identical, no two chips produce the same PUF signature, even chips from the same wafer.
This hardware key is essentially invisible to attackers, making it extremely difficult for them to extract or clone. During the past 60 years, we have developed several security IP based on this foundation. For Root of Trust, our secure OTP store immutable data, TRNG generates true random numbers, and combined with NeoPUF, our PUF RT IP provides chip unique ID and the keys, establishing hardware-anchored trust foundations. By integrating with crypto processors, we offer PUFcc for cryptographic co-processing, and PUF HSM for hardware security module enabling secure key management and cryptographic operations. In terms of cryptography, we support a comprehensive suite of cryptographic algorithms, traditional standards like RSA, ECC, AES, and SHA, as well as PQC for post-quantum cryptography, and many others, providing complete cryptographic coverage for any security requirements. Our solutions have achieved multiple critical certifications.
For post-quantum cryptography, we have NIST CAVP certification covering FIPS 203, 204, and 205, plus SP 800-208. For random number generation, we have also achieved NIST CAVP and ESV verifications. For platform security, our solution are PSA level II ready and level III Root of Trust certified. Additionally, we hold EAL level III certification for IoT security evaluation. This comprehensive certification portfolio ensures our solution meets the most stringent security requirement across all major industries. Altogether, this security approach that has been validated can provide in-depth defense network to secure modern systems. With our security IP in mind, now let me show you how our technology enables the entire AI memory architectures hierarchies. SRAM are the fastest cache embedded directly in GPU, CPU, and NPU of AI accelerators.
The advanced nodes, like 3 nm and below, SRAM cells are extremely sensitive to manufacturing variations. With the ability to repair defective SRAM, HBM, and DRAM cells, our OTPs dramatically improve SRAM yield and lower the cost of the chips. For high-bandwidth memory, HBM are on-package 3D stacked DRAM, providing massive bandwidth for AI training and also inference. HBM stack can be eight or 12 or even 16 layers high. Since a single defect can compromise the entire stack, embedded memory repair ensures stack integrities. Our OTP can endure thermal and also electrical stress, and thus guarantees long-term data memory retention and also operational stability under extreme AI workloads.
For server DRAM, including DDR6-7 and the emerging SoC advanced memory module and DDR5 standards, also benefit from our embedded memory repair solution by OTP, whereas our MTP enables flexible memory management for DIMM configurations in DDR5 and SoC advanced memory module standards. With this IP, we enable cost-effective AI chip mass production. When there are millions of AI server modules, a few percentage points of year improvement translates to $hundreds of millions in cost savings across the industries. For CXL memory, which represents the future of a data center memory architecture, where memory pooling and disaggregation happen at the infrastructure level. Since CXL memory pools are accessed by hundreds of servers, our PUF RT security solution is critical here. Without proper security, data leakage becomes a critical risk.
PUF RT enables multi-tenant data isolation, ensuring that when multiple customers share the same physical memory infrastructure, their data remains cryptographically separated. And for the storage memory, our PUF-based security solution protects data storage within NVMe and SSD controllers to safeguard AI models, which can be worth many millions in development costs and proprietary data. Lastly, let me re-emphasize the key management here. Our IP and the technologies provided by our company, eMemory and PUF Security, are AI memory system enabling technologies. In summary, with our technology, AI memory systems achieve three critical goals simultaneously. First is high yield, which is necessary for economic AI chip production at the advanced nodes. And the second is high reliability, which requires for the AI inference workload in mission-critical applications. And the third is high security, demanded by the enterprise and the cloud AI deployment with multi-tenant environments.
So this is what makes the AI system truly scalable and deployable in production environments. And this is what I would like to share with you today. Thank you for listening. And next, I will enter the Q&A sections.
Thank you, Charles. This concludes our prepared statement. We will now begin the Q&A section. Please submit your questions in the inbox box on the webcast window. All of our questions will follow the format of answering the Chinese version first, followed by the English version. We will now collect the questions and begin our Q&A section.
呃，今天的问题，呃，非常多，呃，我们应该我们会一一回答。好，第一个问题是，公司一直强调每年授权案都持续增加，不管是在晶圆厂越来越多的制程授权，或者是在晶片公司的设计授权，像一年就有600，呃，比如650个，那process node一年大概都有100多个。那如果然后晶圆代工厂呢，又一直在盖厂，那这样来说我们的TAM不是一直在增加吗？那合理上我们的权利金收入应该要远优于代工厂，那是什么样的原因让这样的成长性，呃，还没有看到？那这一题我们请Joseph回答，谢谢。
好，那那个其实TAM的扩大并不会即时等比例地反映在我们的权利金收入上，这两者之间会存在一定的一个时间差，因为不管是晶圆厂这边的制程，呃，这个制程的授权，或是晶片公司的设计授权，我们从签约到设计导入，到客户的产品量产，到最后反映到我们的权利金收入上，通常都需要比较长的一个周期。那尤其是在先进制程以及高复杂度的应用上，这个时程可能会拉得更长。那过去两年其实产业新增的产能以及成长动能其实高度地集中在这个先进制程，而我们相关的授权比较多还是处于在设计以及导入的阶段，那尚未全面进入这个量产的放量期。我们在主要的代工厂12吋的渗透率大概约是1.4%，但是我们认为随着已经累积超过100个16奈米以下的这个tape-out，那慢慢进入这个量产的阶段，未来对权利金，呃，营收成长贡献的空间是非常大的。
Our first question is, the company continues to highlight growth in foundry and design license. With foundries expanding capacity and our TAM increasing, why hasn't our royalty revenue growth outperformed the foundries? Joseph, please.
Yes. Actually, the expansion of TAM does not translate immediately and proportionally into our royalty revenue, as there is an inherent time lag between the two. Whether it is technology licensing to the foundry side or design licensing to the chip customers, the cycle from contract signing to design end to customer mass production and eventually to our royalty revenue recognition typically takes time, and especially for advanced nodes and more complex applications. Over the past two years, while industry growth was concentrated in advanced nodes, many of our licenses were still in the design and integration phase and had not yet reached high-volume production. Currently, our penetration rate among major foundries' 12 in capacity is around 1.4%.
To date, we have built a solid pipeline with more than 100 tape-outs at 16 nano and below, and these designs will gradually move into mass production, and we do see meaningful room for further royalty revenue growth.
呃，联发科跟高通呢，都在最新的法说提到，手机，特别是手机，呃，这个还有一些消费性应用，因为记忆体价格上涨，会压抑需求。请问这样的趋势对公司的影响为何？我们请Michael回答。
好，确实因为记忆体价格大涨，会影响到一些中低阶手机的销售。那我们今年来自美国手机大型客户的营收，主要会受惠于这个Content的增加，那包括像Modem模组相关晶片的导入，另外像Wafer单价的提升，譬如说像PMIC由0.13 micron会转向55奈米，OLED的DDI也会从28奈米转向更先进的16奈米。另外还有像折叠手机的Driver IC，它的用量会从原本的一颗提升为两颗。另外，手机的销售即使不好，但是销后市场事实上会更好。销后市场的DDI，这是刚性的需求，即使消费者不更换整机，只要进行面板的更换，那这也要同步更换DDI IC。那综合以上的因素，都会抵消终端需求疲弱所带来的一个影响。谢谢。
Given the rising memory costs that MediaTek and Qualcomm cite as a headwind for consumer demand, how does eMemory view this potential impact on overall business performance? Michael, please.
This year, the revenue contribution from major U.S. smartphone customers has primarily benefited from the increased content per device, including the following factors: one, increased content from the Modem-related chips, driven by broader adoption across Modem modules. Two, migration to more advanced processes, with PMIC moving from 0.13 micron - 55 micron, and OLED Driver IC transition from 28 nm - 16 nm, resulting in higher ASP per wafer. Three, higher DDI contents driven by foldable smartphones, where the number of display driver ICs has increased from one to two per device. Furthermore, we also benefit from a natural hedge in the aftermarket. Even when new smartphone sales slow down, the demand for replacement panels remains robust because every panel replacement requires a new DDI. This elastic demand allows us to offset any weakness in the new device market and maintain a resilient revenue base. Thank you.
以NVIDIA新一代的平台，譬如说Vera Rubin，强化Confidential Computing跟硬體信任架构为例，那个CS，这个Jensen就讲得很清楚，这是一个Hardware Security Landscape，真的Landing的开始。那公司目前在此类平台中的Design跟商用化进展，可不可以分享多一些？Joseph回答，谢谢。
那其实在NVIDIA的这个Vera Rubin架构中，以Calyptra硬体信任跟导入Rack-scale级别的机密运算，其实开始成为这个核心的一个设计。那这也反映出产业正在进入近20年来相当关键的一波硬体安全的结构性升级。那随着Agentic AI对于资安的要求大幅地提升，那安全的机制其实也不再只是一个外挂的辅助功能，而是直接被纳入晶片底层的一个架构，成为系统设计中非常重要的一个基础。那有了Calyptra的保护，那像OpenAI、Anthropic这样子的模型开发商才敢放心地将他们价值数十亿美元的模型部署到第三方的云端平台上，因为他们知道就是即使是在别人的机器上运行，那这些Model的一些细节跟权重也只有自己的代码可以解开。在这样的架构下，我们已经导入了多项的晶片。那随着我们和全球主要的云端服务供应商的合作持续地深化，在次世代的Calyptra 2.0，我们的Security IP可以支援相关平台在硬体信任以及机密运算上的一个需求。加上推论对于SRAM repair 的刚需，我们认为我们在AI Server的生动率会有更大的一个提升。
Using NVIDIA's next-generation platform such as Vera Rubin as an example of the industry's move toward Confidential Computing and Hardware Security Architectures, could you share more insights into its design in progress and commercialization timeline in this area? Joseph, please.
Yes. Within NVIDIA's Vera Rubin architecture, the integration of Calyptra as a hardware Root of Trust for rack-scale Confidential Computing has become a core design, and this actually reflects a pivotal once-in-two-decade structural upgrade in hardware security. As Agentic AI demands significantly higher security, protection is no longer an optional add-on, but a foundational element integrated directly into the silicon architecture. With the protection provided by Calyptra, model developers like OpenAI and Anthropic can securely deploy their multi-billion-dollar models onto third-party cloud platforms because they can trust that even on external service, their model weights remain encrypted and accessible only to their authorized codes. We have already secured multiple design wins within this framework. As we deepen our collaboration with global CSPs, our Security IP will support the evolving requirements for hardware trust and Confidential Computing in the upcoming Calyptra 2.0.
Combined with the essential demand for SRAM repair in inference chips, we do expect that our penetration within the AI server market will continue to expand. Thank you.
现在已经量产的3奈米客户应该是没有用公司的IP，因为没有看到3奈米的权利金。那我们如何去预期未来的3奈米会有应用导入？那是基于什么样的原因？请Michael回答。
好，目前已经量产的3奈米产品通常是高度客制化的SoC。那一般客户为了尽快进入市场，通常会沿用前一代的设计。但是接下来的3奈米应用，会因为更复杂的设计和安全性的要求，那客户会倾向使用经过验证、可快速导入跟整合型的这个IP，然后能够符合系统级需求的这种Security IP。那这个部分就会是我们的一个优势。谢谢。
Given that 3 nm products currently in mass production have not yet contributed to royalty revenue, how should we think about the adoption trajectory at 3 nm going forward? What are the key drivers that support future penetration? Michael, please.
It's common for the initial wave of 3 nm SoCs in mass production to utilize design legacy from previous generations, as customers prioritize a fast time-to-market. However, we are seeing a clear shift for the next wave of 3 nm applications. As design becomes increasingly complex and security requirements more stringent, customers are moving toward proven, pre-validated, and highly integrated IPs. They need system-level Security Solutions that can be seamlessly integrated into their advanced architectures. This is precisely where our competitive advantage lies, offering a silicon-proven security foundation that reduces design risk and accelerates deployment for our customers.
请问公司后量子加密客户导入的进度？我们请Joseph回答。
好的。那公司目前推出的PUFbase PQC硬体安全解决方案已经通过了NIST FIPS 205以及SP 800-208的认证。那涵盖的是这个，例如说金钥交换以及数位签章等关键的应用。那代表我们相关的技术已经完整地对应到NIST目前所定义的核心PQC规范，那已经具备这个实际导入以及商用化的基础。那至于在应用进展的方面，相关PQC的解决方案已经获得多家伺服器相关的晶片导入，那用来支持他们符合NIST标准的后量子的资安需求，那作为高安全等级系统中硬体信任架构的一个部分。谢谢。
Could you share an update on customer adoption progress for Post-Quantum Cryptography solutions? Joseph, please.
Yes. Our PUF-based PQC hardware security solution has successfully met NIST FIPS 205 and SP 800-208 standards. It covers critical applications such as key exchange and digital signatures, and our technology now fully complies with NIST's currently defined core PQC specifications and is ready for commercial adoption. In terms of application progress, our PQC solutions have already been adopted by several server-related chip customers, and these designs utilize our IP to meet NIST-compliant post-quantum security requirements and serve as a critical component of the overall hardware Root of Trust within the high security systems. Thank you.
公司提到后量子加密会带动公司Secure Solution的需求。那这类的Secure Solution是不是也有本土化的趋势？譬如说美国他希望用美国的IP业者，那中国也希望用中国的业者。这也请Joseph回答。
其实商用电子产品的销售一直都是全球性的，那这也代表security应用必须使用同一个标准，资讯才可以互通。那目前security演算法的标准主要是依循这个美国国家标准技术研究院，就是我们所谓的nist的规范。那我们PUF-based的Security Solutions提供很高安全性的硬体安全，那我们在美国、中国也都蛮多客户。那这也是为什么他们的产品一直都是销售到全球，然后应用我们的ip。谢谢。
We've discussed how Post-Quantum Cryptography will drive demand for our Security Solutions. Do you foresee a trend toward localization in this field where, for example, the U.S. mandates the use of domestic IP providers while China does the same? Joseph, please.
Yes. Regarding the localization of Security Solutions, it is quite important to note that commercial electronics are part of the global market. For data to be interoperable across borders, security applications must adhere to the same unified standards. And currently, the global benchmark for security algorithms is primarily set by NIST in the U.S. And our PUF-based Security Solutions provide high-integrity hardware security that aligns with these international standards. This is why we have a robust customer base in both the U.S. and China, because their end products are designed and ultimately sold in the global market. Thank you.
请问公司能不能详细说明跟DARPA的协议？如果DARPA采用eMemory的解决方案，那DARPA供应商是不是也会采用这些方案？如果是，那eMemory会不会把握这样的机会？Joseph，请回答。
是的。因为当我们的技术被纳入DARPA的专案当中，代表我们的解决方案已经在非常高安全等级的系统中完成实际的一个验证，包含硬体信任的建立、金钥保护，以及这个系统整合等关键的要求。那这类的专案通常会形成一套可供参考的安全设计范本，那让相关的这个系统供应商以及生态系内的这个夥伴可以在后续的专案中进行评估和导入。那实务上，这些供应商在规划，例如说像国防、航太以及其他高安全基础设施的相关产品的时候，往往会优先参考已经通过DARPA验证的这个技术架构，来降低他们这个设计以及验证的风险。谢谢。
Could you please provide a detailed explanation of your agreement with DARPA? If DARPA adopts eMemory solutions, will DARPA supplier also adopt these solutions? If so, how does eMemory proceed with such business opportunities? Joseph, please.
Yes. When our technology is adopted within DARPA programs, it indicates that the solution has undergone a practical validation in high security systems, covering key requirements such as hardware Root of Trust, key production, and the system integration. And these programs typically establish reference security design frameworks that enable relevant system suppliers or ecosystem partners to evaluate and consider for their subsequent projects. And in practice, when these suppliers plan products for applications such as defense, aerospace, and other high security infrastructure, they often prioritize architectures that have already been validated through existing DARPA programs. And this would help reduce both of their design and qualification risks. Thank you.
请问最近很热门的光通讯CPO会不会用到公司的IP？请Joseph回答。
GB，甚至是1.6 TB以上，那光电转换对精准度的要求其实变得非常的高。那在半导体和CPO的应用当中，OTP其实更像一个晶片的身份证以及校准的资料，用来确保说每一颗晶片在系统里面都可以正确的去运作。那我们认为OTP之所以在CPO的应用下不可或缺，有几个主要的原因。那第一个当然就是这个精密的校准，因为每一颗矽光子晶片在生产的时候都会有一些微小的差异。那我们透过OTP来储存雷射功率以及波长的校准参数，可以确保每一颗晶片都能达到他们最佳的这个传输效能。那第二个就是安全以及防伪。CPO在这个AI资料中心其实是一个非常高价值的组件。那我们OTP可以提供唯一的这个识别码，就是我们所说的Unique ID以及Secure Boot的功能，能够有效的防止这个硬体被伪造，那确保说正体执行的一个安全性。那第三点是自动组态的设定。那CPO模组内其实也包含其他复杂的元件。那我们的OTP可以记录硬体版本以及预设的参数，例如说是等化器的设定，那让这个系统在开机的时候能够自动的去识别设备，并且完成最佳化的这个传输设定，那会大幅简化整个这个系统整合的难度。那最后当然是比较直观的节省空间以及高可靠度。CPO的封装空间其实极度受限，那相较于传统需要额外的外部EEPROM，我们的OTP直接整合在晶片的内部，那不仅大幅的节省了这个封装的空间，那也让这个资料更具不可篡改的这个可靠性。
Regarding the trending topic of CPO referred to co-packaged optics, will your IPs be required for these types of optical communication solutions? Joseph, please.
Yes. We already have customers adopting our solutions in 4 nm chips, and we also have startup customers that were recently acquired by industry leaders who have also adopted our solutions. As data transmission speeds accelerate to 800 GB and even 1.6 TB, the precision required for optical electrical conversion becomes extremely high. In the field of CPO, our OTP acts as both a digital ID and a precision calibration profile. There are four core reasons why our OTP is essential for a CPO from our point of view. First is precision calibration. Since every silicon photonic chip has a slight manufacturing variance, our OTP stores laser power and wavelength parameters to ensure that each chip achieves their peak transmission performance. Second is security and authentication.
CPO modules are high-value components for AI data centers, and we provide unique IDs and Secure Boot solutions that will prevent hardware counterfeiting and also ensure the integrity of firmware execution. Third is optimized configuration. CPO modules contain multiple complex components, and our OTP records hardware revisions and default parameters such as equalization settings, allowing the system to automatically recognize and optimize device up and startup, which will significantly reduce the system integration complexity. Last is the space efficiency and reliability. Space is extremely limited in CPO packaging. Unlike traditional external EEPROMs, our OTP is integrated directly into the chip, and this not only saves critical board space but also ensures data remains permanent and tamper-proof. Thank you.
根据这个NVIDIA的Jensen讲，晶片迭代速度从过往的两年变成一年。那这对公司的影响是正面还是负面？Joseph回答。
这对我们而言其实是比较正面的趋势，因为我们提供的是好IP。这一类IP通常是需要通过这个制程的验证才可以提供给Fabless客户使用。那以往Foundry最先进的制程的晶片要等我们IP验证完其实都会来不及，所以我们都需要等前一个制程的客户migrate导入。那现在这样migrate的速度增加表示换IP的机率也大增，那下一代转入的时间也会加速。那此外现在也可以用这个chiplet的方式，比如说最主要的compute die是用最先进的2奈米制程，但是我们的solution可以导入我们已经qualify过的3奈米的chiplet，然后再用先进封装的方式去导入这个主晶片。谢谢。
According to Jensen Huang, chip iteration cycles have shortened from two years to just one. Is this trend a net positive or negative for the company? Joseph, please.
Well, this is actually a very positive trend for us. As a provider of hard IP, our solutions need to be process-qualified before it can be adopted by fabless customers. In the past, for chips manufactured on the foundry's most advanced nodes, completing our IP validation in time for the first wave designs was often quite challenging. As a result, adoption typically occurred when customers migrated from the previous process node. Now, as customers' migration cycles are accelerating, the likelihood of their IP replacement also increases, and the transition to the next generation can also happen faster. In addition, with chiplet-based architectures, even if the compute die moves into the most leading-edge nodes such as 2 nano, our IP can be introduced earlier through a 3 nano chiplet and integrated into the main system via advanced packaging. Thank you.
请问公司跟ARM合作的进展为何？Charles，请回答。
我们和ARM的合作已经从过去单纯的IP授权逐步扩展到更广的技术合作。在技术面上，我们持续让自己的硬体信任根和ARM架构下的安全模组与参考设计接轨，主要是为了因应边缘AI和云端资料中心在机密运算上的实际安全需求。同时在先进制程上，我们也持续整合OTP与Hub的技术来支援整个系统层级的安全设计。
Could you update us on collaboration with Arm? Charles, please.
Our cooperation with Arm has evolved from a pure IP licensing model into broader ecosystem collaboration. On the technical side, we align our hardware Root of Trust with Arm-based security subsystems and reference designs to support confidential computing in edge AI and cloud data center. At the same time, we continue integrating OTP and the PUF technologies on the advanced node platform to meet the system-level security needs.
公司有没有ASIC客户已经导入公司的IP？那主要应用是在哪个领域？请Michael回答。
好，这是四个。我们公司已经有多家的ASIC客户导入我们的IP，相关的专案已经进入先进的制程，并且应用在AI的像加速晶片、CPU、ISP和一些像高速介面如Service等的设计，那对应到AI、HPC等高效能的应用场景。那此外，我们也透过跟ASIC设计服务夥伴的合作，持续扩大相关IP在先进制程平台上的导入跟应用。谢谢。
Do you have any ASIC customers currently integrating our IPs? And what are the specific applications? Michael, please.
We have successfully secured multiple ASIC design wins, with several key projects already moving into advanced nodes. Our IPs are being integrated into critical designs such as AI accelerator, CPU, ISP, and high-speed interface like SerDes, specifically targeting high-performance applications in AI and HPC. Furthermore, we continue to expand the adoption and application of our IPs across advanced process platforms through strategic collaboration with our ASIC design service partner. This collaborative approach allows us to scale our presence and capture the growing demand in the high-end application market. Thank you.
美国要求晶片本土化制造，对公司一直是以中国跟台湾为代工厂为主。这样是不是不利？请Joseph回答。
其实授权我们技术的代工厂以及IDM是遍布全球的，并非只有中国和台湾的代工厂而已。那不论是美国本土公司或是主要的晶圆代工厂，在美国都陆续有这个生产基地，也都会使用我们的IP。那随着先进制程以及安全相关平台的需求提升，那我们认为这对我们来说是相对有利的。谢谢。
In the context of global supply chain realignment, how does the company view future business opportunities with Chinese foundries and their overall contribution? Joseph, please.
Actually, our technology is licensed to foundries and IDMs worldwide, and extending far beyond just China and Taiwan. Both U.S. domestic semiconductor companies and major global foundries with manufacturing sites in the U.S. utilize our IPs. As the demand for advanced nodes and security-integrated platforms continues to surge, we do believe this broad geographical presence positions us favorably to capture these growth opportunities. Thank you.
市场上还有哪些公司有提供相关的Secure IP？那跟他们的竞争力比较为何？Joseph，请回答。
其实除了我们之外，另外还有三家主要的这个Secure IP的公司，那分别是Rambus以及透过并购这个Secure-IC进入这个市场的Cadence以及Synopsys。那Rambus以及Cadence的强项是在他们加密软体层以及协议，那我们则是专注在硬体物理层的安全基础。所以在很多的案子和应用场景里面，他们其实是我们的潜在客户。那Synopsys并购了SRAM PUF业者Intrinsic ID之后，也进入了这个市场。但是相较于SRAM PUF，我们的NeoPUF最显著的优势是在于物理层的稳定性以及可靠度，并且符合Calyptra Root of Trust的硬体标准。由于neopuf不需要额外的这个Error Correction Code或是储存这个Helper data，那这样子的otp能显著的简化系统的架构，并且具备这个优异的抗辐射性。那这样子的特性使得我们的puf、otp、trng和Root of Trust IP都可以在非常高等级的安全应用具备这个非常强的竞争力。
Who are your main competitors in the Security IP market, and how does your competitiveness compare to theirs? Joseph, please.
Yes. When looking at this landscape, we see three other main players who are Rambus, Cadence, who entered the market through the acquisition of Secure-IC and Synopsys. For Rambus and Cadence, they do excel in the software encryption and protocols, whereas we focus on hardware physical layer. Because of this, our roles are often complementary, and in fact, they are our potential customers. For Synopsys, and their SRAM PUF technology, our NeoPUF offers a clear advantage in terms of physical stability. We are fully aligned with Calyptra hardware standards, and most importantly, our NeoPUF doesn't require complex error correction or Helper Data. By eliminating these extra requirements, we can significantly simplify the system architecture. Combined with our radiation-hardened reliability, our PUF-based security IPs remain the top choice for high-security applications. Thank you.
TSMC缩减成熟制程产能，对公司的影响是不是就直接少掉这个市场？Joseph。
其实我们认为主要的晶圆代工厂现在是有计划的在进行这个产能的调整以及调节，而不是单纯的去缩减这个成熟制程。那一些晶片客户本来在这些主要代工厂生产，那可能会因此去转到比较先进的制程。例如说像我们观察到PMIC已经部分从8吋转往12吋，或是他们会委托其他的这个晶圆厂来承接这个量产。等于说这样子的一个调整对客户产品的量产其实影响不是太大，那对我们的业务以及Royalty其实没有实质的影响。那同时我们认为这样子的一个产能调节也能让成熟制程的供需结构比较健康，那晶圆代工的价格反而可以往比较有利的方向去发展。谢谢。
TSMC is reducing its mature node capacity. Does this mean we are losing that market segment entirely? Joseph, please.
Yes. We observe that foundries are engaging in a strategic relocation of capacity rather than a simple reduction in the mature node capacity. Many customers are migrating to advanced platforms because of this. For example, we're seeing transition of PMIC from 8 in - 2 in wafers or leveraging other fab capacity. This shift has no material impact to our customers' production or on our business. In fact, we do believe that this kind of disciplined capacity management actually helps stabilize the supply and demand for mature node capacity, ultimately will foster a more favorable pricing environment for us. Thank you.
那最近成熟制程的代工价是否有调涨？那公司怎么看这个代工价格的趋势？Joseph。
其实随着主要代工厂去调整他们的产能配置，缩减部分这个成熟制程产能，我们的确也有从一些客户那边听到一些成熟制程调涨的声音。不过当然实际的情况还是要看各家代工厂的这个定价策略以及他们产能利用率。那相较于前一段时间成熟制程的价格下滑，目前的价格趋于稳定，甚至出现部分回升。所以整体来看，我们认为对我们的权益性贡献也是偏正面的。谢谢。
Has there been a recent price hike for mature nodes? What is our outlook on foundry pricing? Joseph, please.
Yes. As major foundries adjust their capacity and tighten supply for mature nodes, we are actually hearing from our customers about the potential increase of mature node wafer price. However, the extent of such a price adjustment will depend on specific foundries' pricing strategy and also their utilization rates. But compared to the previous period of price erosion, the current trend of price stabilization and potential recovery is actually quite positive for our royalty revenue from our point of view.
PUF是否在可预期的未来会成为市场主流？相对现在的Secure Solution，那PUF解决了什么问题？有机会让晶片非采用不可吗？Charles，请回答。
PUF的功能是作为unique ID跟那个密钥的用途。除了在AI加速器、data center的security应用之外，在未来Edge AI跟那个Physical AI的发展扮演必须的角色。因为在未来世界里面是一个autonomous的世界，每一个autonomous的物件都要有一个unique ID，而且都要有自己的密钥来保护自己的资料跟资产。
Will PARP become the market mainstream in the foreseeable future compared to current Security Solutions? What specific problems does it solve that make it a must-have for chip designers? Charles, please.
Our PUF technology serves as a unique ID and a secure key. Beyond its current role in AI accelerators and the data center security, it is becoming essential for the expansion of edge AI and the Physical AI. As we move toward an autonomous world, every autonomous device will require a unique identity and its own cryptographic keys to protect both data and the assets. We are providing the foundation of trust for this future.
最近市场很担心这个整个软体产业会被这个AI工具取代。IP产业同样也是高毛利，是不是存在类似的情形？Joseph。
其实我们认为IP产业和纯软体服务其实不太一样。那当然AI的确正在改变设计以及开发的流程，但是在半导体IP的领域，其实真正的核心价值是来自于我们发明的IP以及底层的这个电晶体技术。那这部分当然是受到专利权保护。那再加上这个长时间累积的制程know-how、细验证的经验以及和晶圆厂以及客户之间的深度合作，那这些都不是光靠AI工具就可以轻易取代。那对我们来说，AI其实比较像是帮助我们把研发做得更快，那把验证做得更有效率的一个工具，而不会直接的去取代我们的IP business。那随着制程持续往更先进的节点发展，对IP在可靠度、良率、功耗以及这个安全性的要求当然也就越来越高。那这也更依赖实际量产经验和平台化的一个能力。所以我们认为AI不但不会削弱IP产业的长期价值，反而会让真正有制程深度、量产实际的IP公司跟其他竞争者的差距拉得更开。谢谢。
As AI tools are reshaping the software industry, do you see any comparable impact or structural change emerging in the semiconductor IP industry? Joseph, please.
Yes. We believe that the IP industry is fundamentally different from pure software services. Regarding AI, we see it as an enabler instead of a disruptor. While AI can optimize workflow, it cannot replicate our core value, which is the invention of the underlying transistor technology. Our moat is built on patented innovations and also decades of process know-how and a silicon-proven track record. These are the foundational assets rooted in the long-term trust and physical engineering. These are the things that AI tools alone cannot simply replace. As we move into advanced nodes, the requirements for things like reliability, for yield, for security will become even more stringent. This increases the industry's reliance on actual mass production experience and also platform-level expertise, which creates a significant barrier to entry.
So that being said, rather than diminishing the long-term value of the IP industry, we actually believe AI will further widen the gap between companies with proven silicon success and those without. It will strengthen our competitive moat. Thank you.
In the interest of time, we will begin the last questions.
请问公司所推动的改革措施目前已经观察到有哪些具体成效？Joseph。
其实我们认为改革的成效最终当然还是要回到看这个营运效率和财务的获利结构是不是有真的变好。那这一年来公司持续在做调整这个成本结构以及优化营运的流程。那主要是让我们的经营可以变得更有弹性、韧性以及更有效率。那也可以降低这个外部环境波动带来的影响。那在营收方面，只要整体的代工价格可以趋于稳定，不再持续的下滑，以我们目前的业务组合来看，本身就可以支应相对稳定的一个成长。那同时在我们内部的营运上，我们透过流程优化以及费用控管，去年整个年度的营业利率已经提升了3.4个百分点。那这也可以看到我们的改革已经相对有效的反映在我们的获利表现上。在这样的基础上，随着营运的效率持续改善，加上本身公司就是一个高毛利、低资本支出的一个营运模式，那我们认为获利成长具备一定的结构性杠杆。所以整体来看，我们会持续的用财务纪律以及营运效率作为检视我们改革成果的一个主要指标。谢谢。
Could management share what tangible results have been observed from the recent transformation initiatives? Joseph, please.
Yes. We believe our transformation must be reflected in measurable financial results. Over the past year, we have focused on optimizing our costs and processes to build a more resilient, flexible, and efficient business that can better withstand market volatility. On the revenue side, as long as the foundry pricing remains stable and avoids further declines, our existing business mix is well positioned for steady growth. On the operational side, through ongoing process improvements and cost discipline, our operating margin actually improved by 3.4 percentage points last year. This indicates that our transformation is successfully translating into tangible profitability. With high margins and low CapEx, our business model is built for operating leverages. As we scale, we do expect efficiency gains to drive stronger earnings while maintaining financial discipline throughout our transformation. Thank you.
We will begin the closing comments. Charles, please.
Thank you very much for coming to our investment conference. For more information about our PUF-based security IP and the technology, we encourage you to visit our PUF security website at www.pufsecurity.com and check out our articles and the other materials. Thank you again for your patience and the support for eMemory. We will continue to work hard on technology and the IP innovation and the PUF-based hardware security solution for our customers and bring in a higher return for our shareholders. Thank you.
Thank you, ladies and gentlemen. Please be advised that the conference recording will be accessible within the next three hours. Thank you, everyone, for joining us today. We hope you will join us again next quarter. You may now disconnect. Goodbye and have a good day.