Good afternoon, everyone. Welcome to eMemory's first quarter 2026 webcast investor conference. Joining us today is our Chairman, Dr. Charles Hsu; President, Mr. Michael Ho; Head of IR, Ms. Li-Jeng Chen; Director of the Finance Department, Mr. Joseph Hsia; and Head of Digital Marketing, Dr. Felix Hsu. The format of today's event will be as follows. First, eMemory's Chairman, Dr. Charles Hsu, will give an opening remark. Afterwards, our Financial Officer, Mr. Joseph Hsia, will present a review of our financial results. Following that, President Mr. Michael Ho will share our business outlook. Next, Head of Digital Marketing, Dr. Felix Hsu, will give a talk titled Hardware Security for AI Agents. Then we will conclude today's conference with the Q&A session, where our management team will answer your questions. Please feel free to submit your questions in the input box on the webcast window throughout the conference.
As a reminder, this conference is being recorded, and a webcast replay will be available after the conference is finished. For more information, please visit the company's website under Investor Relations section. As usual, before we begin, we would like to remind everyone that today's presentation may contain forward-looking statements subject to risk factors associated with the semiconductor and IP business. Please refer to the cautionary statement on page 3 of today's presentation. Now, I would like to give the floor over to eMemory's chairman, Dr. Charles Hsu.
Thank you. Good afternoon, everyone. In the first quarter of this year, eMemory continued to deliver record high operating performance. In addition to sustained growth in 3-nanometer licensing for AI server CPU applications, we also successfully expand into new areas such as high-speed interface applications. Meanwhile, as AI infrastructure rapidly evolves, industry demand for hardware security is undergoing a fundamental upgrade. The Open Compute Project's Foundation Chiplet System Architecture introduced in 2025 explicitly requires every chip within a chiplet system to incorporate a hardware root of trust. This signify that every chip in a future AI system will require a built-in hardware security mechanism to ensure system integrity and data security.
Furthermore, the rapid advancement of agentic AI together with increasing government requirements worldwide for post-quantum cryptography is driven what we believe to be the most significant hardware security upgrade cycle in the past two decades. In response to this trend, we are actively evolving from an IP providers into a system-level security solution provider. Our internal developed hardware security module product is expected to be officially licensed for customers' mass production employment deployment upon completion of U.S. NIST National Institute of Standards and Technology certifications. We believe eMemory will be one of the key beneficiary of this global hardware security upgrade trends. At the same time, the core technological foundation of eMemory remains as a logic non-volatile memory.
We have a long focus on enabling non-volatile memory technology through a standard logic processes. In addition to being embedded into SoC in IP form, this technology also have the potential to evolve into standalone memory products. Recently, global flash memory supply has remained constrained. eMemory's key advantages lies in our ability to directly leverage mature logic process capacity to produce non-volatile memory, avoiding the capacity bottlenecks associated with conventional dedicated flash manufacturing lines. We are currently working closely with multiple foundries to advance the related technology and the customization effort. This development not only carries strong strategic value for foundries and system customers, but also has the potential to become the next major growth driver for eMemory's revenue and probability, following the OTP and the PUF security solutions.
Next, I would like to invite our CFO, Mr. Charles Hsu, to present the operating result for the first quarter of 2026.
Good afternoon, everyone. Thank you for joining us. Now allow me to walk you through our financial results for the first quarter of 2026. 2026 Q1 revenue was TWD 1.09 billion, increasing 4.4% quarter-over-quarter and 20% year-over-year. Operating expenses were TWD 432 million, up 4.6% sequentially and up 10.8% year-over-year. As a result, our operating income reached TWD 662 million, representing an increase of 4.2% quarter-over-quarter and an increase of 26.8% year-over-year. Operating margin was 60.5%, relatively flat sequentially, down by 0.1 percentage point, but increased by 3.2 percentage point year-over-year.
Net income for the quarter was TWD 596 million, it experienced an increase of 5.9% sequentially and an increase of 29.1% year-over-year. EPS for this quarter was TWD 7.98. Next, let's move on to revenue mix by licensing and royalty. Licensing in the first quarter accounted for 34.8% of the total revenue, up 9.9% sequentially and up 58.6% year-over-year. On U.S. dollar basis, licensing grew 7.8% quarter-over-quarter and 64.4% year-over-year. Royalties, on the other hand, contributed 65.2% of the total revenue, increasing 1.6% sequentially and increasing 6.2% year-over-year.
On USD basis, there was a 1.2% decrease quarter-over-quarter, but 11% increase year-over-year. Overall, revenue increased by 4.4% quarter-over-quarter and 20% year-over-year. On USD basis, the growth was even stronger at 1.8% quarter-over-quarter and 25.2% year-over-year. With that, I will break down the revenue contribution by specific IPs. First of all, NeoBit. NeoBit accounted for around 20% of the total revenue in the first quarter. Its licensing revenue decreased 28.4% sequentially and decreased 13.7% year-over-year, while royalties increased 3.1% sequentially but down 4.2% year-over-year. Secondly, for NeoFuse.
NeoFuse accounted for around 59.8% of the total revenue in the first quarter. Its licensing revenue increased 39.8% sequentially and increased 20.7% year-over-year. In terms of royalty revenue, NeoFuse royalty increased by 0.5% sequentially and increased by 7.4% year-over-year. For PUF-based security IPs, it contributed around 12.2% of the total revenue in the first quarter. Its licensing revenue increased 21.5% sequentially and increased by 606.9% year-over-year, while its revenue account for around 1% of the total royalties in the first quarter. Lastly, for MTP technology, it accounted for around 8% of the total revenue in the first quarter.
Its licensing revenue decreased by 5.5% sequentially, but increased 37.9% year-over-year. Royalty from MTP was down 3.1% sequentially, but increased by 45% year-over-year. Now let's look at the royalties for 8-inch and 12-inch wafers. 8-inch wafers accounted for around 33.7% of the royalties in the first quarter, down 5.5% sequentially and down 15.9% year-over-year. On U.S. dollar basis, this represents a sequential decrease of 8.2% and a year-over-year decrease of 12%. On the other hand, 12-inch wafers contributed 66.3% of the total royalties in the first quarter, up 5.6% sequentially and up 22.5% year-over-year.
On US dollar basis, this represents a sequential increase of 2.8% and a year-over-year increase of 28%. A total of 139 licensed product tape outs were completed in the first quarter of 2026. Further details will be provided in our management report, which will be released shortly after this earnings call. Next, I would like to pass the floor to our President, Michael Ho, to share more about our future outlook. Thank you.
Good afternoon, everyone. In the following section, I will address our future outlook. For licensing revenue is driven by an increase in the number of license from both foundries and the fabric customers, as well as higher average selling price per license. Demand remains strong for advanced node technologies, AI-related applications, security-related solutions, and the next generation flash technologies. For royalty revenue, continue to accelerate, driven by upgrades of existing products, higher ASPs from the new advanced node applications, expanding PUF royalty contributions, and a growing mix of a higher royalty rate MTP products. For the new IP technologies, one, continued development of next generation OTP and PUF-based hardware security solution targeting sub 2 nanometer process nodes. Two, new flash expanding in both embedded and standalone 1T Flash applications, leveraging large process-based architecture for improved scalability and cost efficiency. For business development platforms, one, chiplet security platform.
The company is collaborating with ecosystem partners to develop end-to-end chiplet security solutions, covering key technologies, including the supply chain security, chiplet authentication, secure communication, and a hardware root of trust. These solutions are designed to address the licensing security requirement driven by AI and heterogeneous integration architectures. Two, for data center Caliptra platform, targeting data center and AI server applications, we are developing a comprehensive IP platform that combines PUF-based root of trust with a security subsystem architecture. This platform enable customers to accelerate adoption and mass production of hardware security solutions complying with the Caliptra framework and the future data center security standards. Three, root of trust and the CPU platform collaboration. Our hardware security technologies have been successfully integrated into the latest generation AI, AGI CPU platforms of major CPU vendors, providing chip-level root of trust, secure boot, device identity, and secure key protection capabilities.
These technologies enhance trustworthiness and secure across the AI system from the chip to system level. Four, HSM edge server platform. Our PUF-based HSM edge server is positioned as a key infrastructure component for future security as a service, SECaaS platforms. The platform supports critical applications, including secure OTA updates, privacy protection, device identity management, and Post-Quantum Cryptography migration for the automotive, medical, industrial control, edge AI, and others high-security systems, helping the customer build sustainable next-generation security architectures. This concludes my comments. I will now hand over to Felix, our head of digital marketing. Thank you.
Good afternoon, everyone. Thank you for being here. The AI industry has spent the last few years building agents that can act on the world, not enough time building the foundation that makes those actions trustworthy. That serious need for security is what we're going to talk about today. An AI agent is not just a chatbot. A chatbot answers, an agent acts. It runs in a loop. First, it gathers context. It reasons. It decides. It executes in the real world, it records the result and provides status update. It does it again and again. There are 3 key things we need to know about this loop. First, it's autonomous. The agent decides for itself. There's no human pressing approve between steps. Second, it runs at machine speed. We're talking over 1,000 decisions per minute.
No compliance officer, no security team, no human reviewer can keep up with that in real time. It is mathematically impossible. Third, this is an important point. Different steps carry vastly different stakes. When the agent is reasoning internally, a mistake is recoverable. The moment that the loop touches the external world, which involves money, contracts, identity, infrastructure, the stakes become absolute. There's no undo button on a wire transfer, and there's no rollback on a signed contract. At every single step of that agent loop, there are two distinctive categories of risks. The first one is integrity risk, whether the agent is thinking with the right information, whether it's being fed false data, whether its reasoning engine is one, the one we deployed, or has been silently swapped, whether its memory has been tampered with.
The second one is authorization risk, whether the agent is allowed to do what it's about to do, whether the action was approved by a human, whether the agent is even who it claims to be. There are fundamentally different problems. Here's what the market has missed. Most of the security industry today only address one of them, usually it's integrity, through software signing and model verification. However, the authorization side, the matter who has the right to act, is largely being handled by software policies that an attacker or even a misaligned agent can route around. You cannot have confidence without solving both. A perfectly authentic model executing an unauthorized transaction is still a catastrophe. An authorized agent running tampered logic is still a catastrophe. Both columns have to be risk-free. Today, in production AI deployment, they're not.
Every major regulatory framework now being written, including the EU AI Act, the emerging U.S. governance frameworks, the financial sector guidelines, they all converge on the same 4 requirements. First, it's a human-in-the-loop approval for high-stakes decisions. There's tamper-proof audit logs, protection of models from theft, and finally, zero-trust authentication on every interaction. Every AI vendor in the world will tell you they offer these things, every one of those promises in current implementations has the same fatal weakness. It lives in software. In the case where PUF is absent, having software is not sufficient, as shown in the right column. Software signatures can be forged. Software audit trails can be rewritten by anyone with sufficient privilege. Software keys can be extracted. Software identity can be impersonated.
What this means in practice is that today's AI governance is, to use a phrase we keep hearing from CISOs, governance theater. It looks compliant on paper. It does not survive contract with a determined attacker. The only way to make these promises enforceable rather than aspirational is to follow the middle column, knowing what governance requires and anchoring the promises in something that we know the exact identity of with signatures that cannot be copied or extracted, keys that cannot be stolen, which essentially is describing hardware. In other words, it has to be a property of the silicon itself, unique to each chip, generated at the moment of need, and never stored anywhere it can be stolen. All arrows are pointing to PUF. Thus, we, eMemory, provide the foundation layer, the hardware root of trust.
On top of that foundation, three properties become possible, the properties that no software-only stack can deliver. First is identity. Every AI agent, every device, every chiplet, every endpoint gets an unforgeable identity that is intrinsic to its silicon. It cannot be cloned because the physical randomness it derives from cannot be replicated, even by the foundry that made the chip. Next is integrity. Models, prompts, and agent logic stay sealed to the hardware that's authorized to run them. If you steal the model file, and it's useless, blob of encrypted bytes. There's no key file to steal alongside it because the key is never written down. Finally, there's authority. Human-in-the-loop approval, audit logs, policy enforcement, all of these regulators are mandating become cryptographically enforceable rather than procedurally promised. The audit log is no longer what the system says happens.
It is provable in court, if necessary, by anyone with the public verification keys. The AI governance platforms, the agent orchestration tools, the compliance dashboards, these are all valuable, and they are all building real businesses. eMemory is positioned at the hardware layer that everything else depends on. In summary, by moving security from the software layer to the silicon itself, eMemory enables agentic AI to operate with the level of autonomy and authority required for high-stakes industries like finance, healthcare, and autonomous infrastructure. Okay, that concludes my talk. Thank you for your time.
Thank you, Felix. This concludes our prepared statements. Next, we will enter the Q&A section. We will now begin the Q&A section. Please submit your questions in the input box on the webcast window. All of our questions will follow by the format of answering the Chinese version first, followed by the English version. We will now collect the questions and begin our Q&A section. Royalty revenue in April declined compared with the previous quarter, while foundry revenues generally increased quarter-over-quarter in Q1. Together with the potential impact from foundry price increases, is there any particular reasons for this difference? Michael, please.
Based on what we have heard, foundry price increase generally start from the second quarter or expect to take effect in the second half of the year. Therefore, the impact was not yet reflected in the first quarter royalty. The decline in royalty revenue was mainly due to a temporary disruption caused by the sale of one Taiwan-based foundry customer. That foundry happened to be the production site for certain end customer applications, which led to a short-term decline in royalty contribution. We expect this impact will be temporary, as the chip customers ship production to other foundries. The related royalty revenue should gradually recover.
What was the reason behind the decline in 8-inch royalty revenue in the first quarter? Will the recent increase in 8-inch foundry pricing provide support going forward? Michael, please.
The royalty revenue recognized in Q1 reflects the foundry shipment from the fourth quarter of last year, therefore still reflects last year's foundry pricing. Since foundry price increases are being implemented gradually this year, the impact of our royalty revenue is expected to be reflected in the second half of the year.
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As SRAM becomes increasingly important and die size or density continue to grow, there is a stronger incentive for customers to adapt repair IP. Could you share the company's development progress in AI related projects in this area? How many projects are currently in the pipeline, and could we start to see royalty contributions in the coming years? Michael, please.
Our OTP has long played an important role in SRAM repair applications. We have already worked with Siemens to integrate our technology with their Tessent software, offering the validated solution that helps simplify the design process and accelerate customer adoption. Currently, the company has multiple AI related SRAM repair design wins, many focus on the advanced node chips such as AI data center processors, memory controllers, and CXL related devices. As these designs are finalized and move into mass production, we expect the related royalty contribution to become increasingly visible.
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Could you provide more details on the development of the company's 1T Flash architecture and technology? Can this technology be used for both NOR and multi-level cell or MLC applications? Are there any foundries or IC design customers currently engaging with the company? Charles Hsu, please.
1T Neo Flash adopts an innovative write architecture that overcomes the limitation of the conventional 2T design and removes the address select component. This significantly reduce the memory cell area. Essentially, this is a flash technology built on the standard logic processes, and its key advantage include the ability to support both embedded flash and the standalone flash, a shorter development cycle, low cost and higher yield, and a greater manufacturing capability. We believe this represents a significant innovation as both embedded and standalone flash can be more easily implemented using existing logic process platforms. The technology can support NOR flash, 2D NAND flash, and the multi-level flash cell, and all MLC applications. The technology has now entered the active development stage and we are already collaborating with several foundries and fabless companies.
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What are the key differences between embedded memory technology and standalone memory products? Can the know-how we have accumulated in embedded memory be directly applied to standalone memory? Who are the potential customers? Charles, please.
eMemory has long build its core technology platform around logic non-volatile memory. This platform helps customers achieve a faster development, higher and lower cost across both advanced and mature process nodes. The key advantages of our technology platform include 3 area. First, faster development. Since our technology can be implemented using a standard logic process, it does not require major process change or modification to the existing device model. This helps significantly shorten the development and also adoption cycles. The second is higher because the technology is fully compatible with a standard logic process, and it does not require complex special device or additional critical processes that it is easier to maintain high yield and stable mass productions. The third point is lower cost.
With a simpler process flow and a shorter cycle time and also higher yield, the overall wafer manufacturing and the system cost can be effectively reduced. On our 1T logic flash platform, the same core memory technology can support both embedded flash and also standalone flash. In fact, the core memory array design is quite similar between the embedded and also standalone flash. The main difference lies in the system interface. For embedded flash, the interface is customized based on the requirement of each SoC system. For standalone flash, the interface follows industry standard in order to support a wide range of system platform and also end applications. Therefore, our 1T memory platform can support both embedded and standalone flash, and also has the potential to extend into both NOR flash and NAND flash architectures.
More importantly, because this technology can leverage existing logic processing capacity, it does not require customers or partners to build dedicated traditional flash production line or make a larger scale additional CapEx investment. This gives the technology significant development potential and strategic values, especially as the global flash supply chain evolves and also AI related demand continues to grow. The potential applications are very broad, including AI servers, edge AI and smartphones, electrical vehicle, industrial control, networking equipment and various high security and also high performance compute systems.
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Traditional IP companies such as Arm, Rambus and Alphawave have been expanding into chip products. Is eMemory moving into standalone memory similar? Could this become a future industry trend? Charles, please.
Okay. The companies mentioned above are many IP design company. They typically develop IP product based on the existing process technology and the standard transistor architectures. But the eMemory's core competence niche, however, lies in the invention of and the platformization of the memory technology itself. We are not only design IP. We innovate from the underlying memory device, process integration and the architecture level to build a complete technology platform. As a result, in addition to developing and sell IP by ourselves, we can also license our core memory technology to other companies, allowing partners to further develop them into IP or end products.
From a business model perspective, we will continue to operate our IP business directly, in order to maintain technology leadership and the market influence. On the product side, we can enable more partners to participate in the product realization, and mass production through technology licensing, while eMemory collects a royalty based on the product shipments. Since the product licensing is closer to the end market, in the value chain, the potential royalty scale is typically much larger than that of traditional IP licensing. This has always been an important growth direction for eMemory. we main major focus on de-evolve into a technology licensing company with a strong core technology platform and a broader influence across the product ecosystem.
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What are the key drivers of revenue growth this year? Michael, please.
Revenue growth this year is driven by both upgrades of existing applications and the ramp-up of new applications. For existing applications, product upgrades have led to a higher royalty ASP, such as the OLED DDI for foldable smartphone at 16 nanometer, and the PMIC migration from 8 inch process to 55 nanometer. At the same time, several new applications are gradually entering mass production, including the smartphone modem related chips, AI CPU, BMCs, embedded controllers, SSD controllers, CXL controllers, DIMMs, and high speed networking interface applications. These new ramps are expected to further support the revenue growth.
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As mature foundries raise prices while consumer smartphone demands remain weak, how does the company view the effectiveness and sustainability of this price increase? Joseph, please.
We believe mature price adjustments are supported by structural factors. First, leading foundries are allocating more resources to the most advanced process nodes and advanced packaging, and this indirectly reduces the effective capacity available for other mature nodes. Second, AI related applications still require a significant amount of mature node capacity, whether in data center, in edge AI, or in physical AI. Many supporting components, such as high voltage and high current power devices, are still being manufactured on mature nodes. I think a good example is the recent development of CPO architecture. In a CPO architecture, usually, only the most critical components such as switch ASICs or TSPs, they adopt advanced nodes like 5 nano or 3 nano for maximum computing efficiency.
Many surrounding optical analog and power related components, they continue to use mature nodes to achieve the best balance of performance, power, area, and cost. We have also observed that some foundry customers are reallocating capacity and resources. For example, certain power related businesses are being shifted to other foundry partners while more resources are being directed towards developing CPO related processes.
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With the continued advance of advanced nodes and growing demand for high performance computing, are you seeing more adoption opportunity for your solutions on Arm-based platforms? Charles, please.
AI is, as AI, AGI CPUs move into mass production, demand for root of trust solution among advanced node CSS customers has increased significantly. We have already seen multiple customers adopt related solutions.
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Could you share the progress of the company's collaboration with Intel Foundry? Joseph please.
Yes, our collaboration with Intel Foundry is mainly focused on advanced node OTP and PUF-Based Security IP. We are actively working with Intel to bring our PUF-Based IP onto Intel 18A to address the supply chain security requirements from the U.S. government and the related markets. Thank you.
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What is the potential from DRAM module related applications? Which product lines would benefit the most? Joseph, please.
DRAM module related applications represent an important growth opportunity for our OTP, MTP, and security IP businesses. This is mainly driven by AI servers, which are increasing demand for DDR5, CXL memory, HBM, and high-speed memory modules. These products require stronger yield management, module configuration, and security protection. For our OTP, the main application are repair and identification, such as memory repair. For MTP, the main applications are updatable configuration and module management, such as SPD Hub and PMIC setting in DDR5 DIMMs. For security IP, the main applications are data security and hardware root of trust. Going forward, DRAM module will no longer be viewed simply as memory component. They will become keynotes in AI servers, in CXL memory ports, and in data center architectures.
Therefore, as a result, the security requirement for DRAM will continue to increase. Thank you.
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As the company expands into more technologies, will this require significant R&D investment and lead to a sharp increase in operating expenses? Joseph, please.
Yes. Most of our technologies are built on years of accumulated knowhow and are extensions of our existing core technology platforms. Our technology are ultimately implemented by foundries and chip customers. Under our business model, customers and partners, they pay licensing fees to help cover the cost of our R&D teams. In addition, CapEx during the development process, such as test chips and related equipment, are typically borne by customers indirectly as well. This has been our longstanding business model. It also reflects the trends of our core technology and the significant value our technology bring to the customers. Otherwise, this model would not be sustainable at all. For the technologies we are currently expanding into, much of the core R&D and patent development has already been completed.
Going forward, the additional expenses will mainly come from execution related R&D headcount. As licensing projects increases, the related licensing revenue should also be sufficient to support the required R&D investment. Therefore, we do believe the OpEx will remain within a manageable range. Thank you.
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What is the company progress in next generation AI computing platforms such as the Vera Rubin platform? Joseph, please.
Yes. The Vera Rubin platform is the first computing generation to adopt Caliptra 1.0, which was released by OCP back in March of 2024. This is also the first specification to include OTP and PUF into the design requirements. Based on this specification, our technologies have started to be adopted in CPUs, in BMCs, in SSD controllers, CXL controllers and other networking related chips. More importantly, OCP specifications are not limited to Vera Rubin architecture itself. They are also applicable to other cloud service providers, to telecom operators, to large enterprises building their own private cloud data centers. After that, OCP further released Caliptra 2.0, which includes the PQC as well as the Foundation Chiplet System Architecture, which was mentioned by our Chairman in the beginning of this earnings call.
That clearly requires a hardware root of trust in their standards as well. This reflects the market's growing need for a unified hardware security architecture and persistent data management. Under this trend, functions such as chip repair, data storage, and hardware root of trust are gradually being adopted across different computing components. That we believe moving forward, towards a more consistent architecture. As each new generation of AI platform evolves, we do expect our penetration in AI related applications to continue to expand over time. Thank you.
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As the company expands its security business toward system level solutions, what would the business model look like? Who are the potential customers? Joseph, please.
Yes, in the development of our hardware security systems, our core strategy has two main directions. First, we are using PUF as the core foundational technology to develop our next generation hardware security modules, which we call the HSM. Second, we plan to use HSM as a security platform to further develop security as a service related applications and services. Through this architecture, customers will be able to build hardware security systems with a high level of security and trust. These systems can protect not only the operation of devices and systems themselves, but also broader application layer security needs, including things like AI, like communication, data protection, identity authentication, and cloud services.
In terms of business model, eMemory will continue to focus on technology licensing. We plan to license the HSM platform and related security technologies to OEMs and to system companies for productization and mass production. We'll be collecting royalties based on the end product sales. Potential customers include telecom operators, hardware security equipment providers or edge AI OEMs, industrial PC, AI infrastructure providers, and various AI and cloud system operators that will be having a growing demand for the PQC and the hardware root of trust. Thank you.
In the interest of time, we will begin the last questions. What is the company's progress in system-level hardware security? How should we think about future HSM or security as a service opportunities? Joseph, please.
Yes. Okay. The company's development in hardware security is gradually expanding from our existing IP licensing business into a system-level security solution. Overall, we can look at the architecture in three layers. First, the HSM core computing layer at the bottom, the key and the certificate management layer in the middle, and the application service layer on the top. At the HSM core computing layer, we are using PUF technology as the foundation for hardware root of trust, and based on this foundation, we're developing different types of HSM products to support personal devices, compliance needs for SMBs and high-end network HSM applications.
Going forward, these products will further integrate PQC and PUF technologies with the goal of meeting international cybersecurity certification standards and requirements, and this will help strengthen the product credibility and market acceptance in high-security applications. At the key and certificate management layer, we are also working with external certificate and PKI ecosystem partners. The goal is to integrate our underlying hardware security capabilities with certificate management systems and provide a more complete HSM plus PKI solution. This will help customers adopt hardware-based security architecture more efficiently for applications like identity authentication, key management, digital signatures, and system trust management. Lastly, at the application service layer, we have completed the development of our signing as a service platform.
In the future, this platform can support applications such as digital signature, such as device identity, trusted data verification, and DID wallets. This means the company can not only provide hardware security IP, but also has the opportunity and capability to participate in the security as a service business model. To conclude the things, overall, the HSM and security as a service represent an important direction for the company as we expand from an IP provider into a system-level security solution provider. In the near term, our focus remains on technology integration and application validation. Over the medium long term, we see the opportunities to build new business models and growth drivers through our HSM platform licensing, through PKI integration solutions, and upper-layer security services. Thank you.
We will begin the closing comments. Charles, please proceed.
Okay. Thank you once again for your patience and the support for eMemory. We will continue to work hard on technology and the IP innovation and the PUF-based hardware security solution for our customers and also bring a higher return for our shareholders. Thank you.
Thank you, ladies and gentlemen. Please be advised that the conference recording will be accessible within the next 3 hours. Thank you everyone for joining us today. We hope you will join us again next quarter. You may now disconnect. Goodbye, have a good day.