This is Ueki speaking, and I will talk about the strategy of the electronics business. I am Ueki, Head of the Electronics Division. Today, the presentation will be divided into five parts, which you see on the screen. First, we start with the overview of electronics business. The overall picture and the direction of the overall business will be given, and that will be followed by the overview and strategy of the semiconductor packaging business, our growth driver, and its focus areas. That will be followed by trends and focus areas of the semiconductor packaging business, and fourth, a technology roadmap and background of the semiconductor packaging business will be discussed. And lastly, specific activities in the semiconductor packaging business to realize the technology roadmap that will be introduced. Let me start with the overview of the electronics business. Net sales in fiscal year 2024 was JPY 283.3 billion.
Non-GAAP operating profit was JPY 53.4 billion. Non-GAAP operating margin was 18.9%. The electronics business accounted for 16% of consolidated net sales of TOPPAN Holdings. Semiconductor-related sales was JPY 194.8 billion, led by semiconductor packaging. Sales in displays was JPY 88.5 billion, led by anti-reflective films, light control films, and small and medium-sized TFT- LCDs. Next is the 2025 forecast for the electronics business. For photomasks, no sales or operating profit is posted from fiscal year 2025, with Tekscend Photomask transitioning to an equity-method company. For the remainder, it is the same as what we discussed at the financial results briefing, so I will not go into the details here. Next, using this slide, let me talk about the direction of the electronics business. Today, we will be discussing the semiconductor packaging business in detail. This business is positioned as a focus area.
We will focus on the high-end FC-BGA market centered on AI applications. At the same time, we will develop and launch advanced semiconductor packaging business like glass core substrates and organic RDL interposers. In the display business, for anti-reflective films, we will launch an ultra-wide production manufacturing line in 2026, and for quantum dots, we will launch a nanomaterial business centered on materials, and for light control films, we will expand the business of new products for automotive applications. We aim to promote initiatives for business expansion and drive structural reform of low-profit businesses. Through these initiatives, the electronics business will concentrate management resources on the high-value-add semiconductor packaging business and drive transformation into a business portfolio that capitalizes upon our proprietary technology to accelerate business expansion. Next, let me talk about the electronics business's medium to long-term outlook.
We position the semiconductor business as the growth driver and will firmly maintain high profitability by supplying cutting-edge key devices leveraging technical superiority. As you see on the slide, for the semiconductor business, by expansion of AI-related applications for FC-BGAs and the launch of advanced semiconductor packaging business, sales CAGR of 26% and non-GAAP operating margin of 30% will be aimed at. For the electronics business as a whole, we will achieve a sales CAGR of 22%, and in fiscal 2030, we will significantly expand our business to reach sales of JPY 350 billion. From here, I will talk more in detail about the focus area of the semiconductor packaging business. I will start with the overview and strategy of the business. Our main product is FC-BGA, but what is it? Let me explain.
FC-BGA substrates are high-density semiconductor packaging substrates that enable high-speed multifunctional LSI chips that are used in network devices, server CPUs, generative AI, consumer, and automotive devices. If you are to liken IC chips to the brain, FC-BGAs can be likened to the neural network, so they transmit huge amounts of information and energy. By developing substrates with ultra-high-density interconnect structures based on our microfabrication and build-up wiring board technologies, we provide products that support semiconductor process miniaturization. Next, let me talk about our current FC-BGA business domains. The pie chart on the left-hand side shows the 2024 FC-BGA market by application. High-end applications like high-end switches and servers account for 25% of the market. Consumer, automotive, and others account for about 75% of the market. On the right-hand side is TOPPAN's business by application. High-end applications account for a much larger share of 83% compared to the general market.
We have focused on high-value-add markets like high-end switches and servers. Here, we show TOPPAN's position in FC-BGA substrates for high-end switches. In high-end switches that aggregate network communication and process it at high speed and stability, we secured the number three position globally in fiscal year 2024 due to our high technical capabilities and stable supply.
From here, we will explain TOPPAN's focus areas in the semiconductor packaging business strategy, including FC-BGA. As organized on the left table, we have designated three areas: high-end switches, AI accelerators, and server CPUs as our next phase focus areas. As for AI accelerators, as shown in the upper tier of the triangular diagram on the right, we will target AI ASIC applications, in particular as a domain where customization is required more than scale.
Using technological superiority as a source of our competitiveness, we will target high-end areas where we can leverage our competitiveness. Along with this, regarding the business domains that we have previously described as for communications and servers, or AI and non-AI, we will, going forward, explain them based on the definitions shown on this diagram. The diagram on the right schematically illustrates the configuration of a large-scale network at a data center. Lower left shows a network centered on general-purpose servers centered on conventional CPUs, while the right side represents a network based on AI servers using GPUs and AI ASICs, which have been expanding in recent years. At the top are the switches that comprise networks in these data centers, which we define as general-purpose switches. Meanwhile, the components on the lower right that interconnect multiple AI servers and enhance the AI processing capabilities are defined as AI switches.
Within these AI servers, the items shown in blue squares represent AI ASICs, which have particular strength in inference AIs. The components shown in green squares, which are used in both general-purpose and AI servers, are the CPUs. Among these, we will particularly target the domain based on Arm architecture, which is superior in power consumption efficiency. Let me explain the market outlook of these focus areas. The three focus areas that we target, high-end switches, AI ASICs, and server CPUs, are the blue bars in the right FC-BGA substrate market. Strong growth that will drive the overall market expansion is expected. We will focus on high-profit, high-end domains that are expected to grow against the backdrop of development of AI and expand our business. Finally, as a point to evolve from the conventional FC-BGA centered business, I will explain about our proposal for solutions geared towards social issues.
For the focus areas as shown in the center, while the conventional FC-BGAs themselves need to be more sophisticated, there's a demand to evolve towards new trends such as photonics-electronics convergence. In addition, supporting materials like glass core or interposers. A new package format will become key technologies. In response to these challenges, in addition to FC-BGA micro-interconnect and layering technologies, we will bring together know-hows in glass transfer cultivated through the display business, LSI design and process cleanup acquired through the semiconductor business, and CMP slurry technology helped by our group company, TOPPAN Infomedia. At the same time, through collaboration with customers, partner companies, and universities, we will advance technological development while grasping new needs. In parallel with this, in terms of the expansion of business scale, we will open new production lines in and out of Japan while carefully examining customer needs and building production structure.
In this way, as we eye the societal issues that accompany the advancement of AI by creating solutions that capture the entire semiconductor packaging domain, we will shift from the FC-BGA business to a semiconductor packaging solutions business. That is all from me.
I am Katsumura, Deputy Head of the Electronics Business Division. From here, I will explain the market trends that form the background for our focus areas and strategies that Mr. Ueki just explained. This shows the proportion of AI semiconductors within the global chip demand. The AI semiconductor market is expected to grow by approximately seven-fold over the eight years from 2022 to 2030, driving the overall market. Cloud demand centered on servers, which is related to our focus areas, is also expected to grow accordingly. The rise of AI brings about a dramatic expansion in data traffic.
The world is entering an era in which everything generates data. The global data traffic is estimated to increase 100-fold over the 20 years from 2020 to 2040. In order to process this enormous volume of data, the structure of data centers themselves is also changing. In AI model development, the scale of computation has exceeded the capacity of the GPUs in a single AI server. To process this efficiently, data centers now connect multiple GPU servers in parallel and operate them as one large computer. AI processing involves constant synchronization across multiple servers, leading to a greater volume of communication through network switches outside the servers than in conventional networks. As a result, communication performance becomes a key factor in AI performance.
Along with this, networks are changing to support both scale-up, which boosts the performance of individual AI servers, and scale-out, which enables distributed processing by connecting a large number of servers in parallel. The performance demanded of network switches is becoming increasingly sophisticated. As a result, in the data center switch market, one of our focus areas, the shipment volume for AI servers is projected to grow by 3.2x over the six years from 2024 to 2030, and both unit prices and shipment values are also forecast to trend upward. In this way, driven by switches for AI servers, the network switch market is expected to expand. Next, I will explain the demand trends for AI ASICs, which are another focus area.
In the use of AI, two phases are required: the training phase, in which foundation models are developed, and the inference phase, in which trained models are used. The performance required of AI servers differs in each phase. In the training phase, enormous computational power is required in the process of improving models by feeding back calculation results, whereas the inference phase uses already trained models to rapidly calculate the results. As trained foundation models accumulate, the demand is expected to gradually shift toward inference applications toward 2030. As the required AI applications change, what is required of the AI semiconductors that enable them also changes. The CPUs and GPUs shown on the left-hand side of the diagram use software control to exchange data with memory and compute step by step. Consequently, while they offer high versatility, they are not optimized for specific applications.
On the other hand, the custom circuit on the right, namely the ASIC, is designed from the outset to be optimized for specific processing tasks such as inference. This enables high-speed operation by minimizing software control while simultaneously optimizing and shortening interconnects to achieve significant reductions in power consumption. From the perspective of speed and efficiency, there are increasing needs in the market to use high-performance GPUs for training that requires huge computing power and use AI ASICs for inference. Consequently, as inference AI expands, the volume of more power-efficient AI ASICs is projected to grow at a high annual rate of 16% between 2024 and 2030. Furthermore, the customization required for AI ASIC development is another reason why we have designated this area as a focus area. Lastly, the trend for server CPUs, one of our focus areas, will be explained.
Traditionally, the x86 architecture CPUs adopted by Intel, AMD, IBM, and others held an overwhelming market share. In recent years, as AI servers with high power consumption in particular are frequently employed, the proportion of CPUs utilizing the more power-efficient Arm architecture is increasing. Thus, the three focus areas our company targets, high-end switches, AI ASICs, and server CPUs, have all been chosen with an eye on the social challenges arising from expanding AI needs.
I am Furuya, Head of the Semiconductor Subdivision. So far, we have explained the background to our focus areas expanding in line with AI requirements. Now, we will talk about our technology roadmap with these changes in mind and the technical background. Here, the evolution of our semiconductor packaging technology is shown as a roadmap. At the bottom is the conventional FC-BGA substrate.
In addition to our ongoing response to large-scale high-layer count packaging, we will enhance our technological value by addressing the transition to board-level optical interconnects for the I/O 2.0 generation and further to chip-to-chip optical interconnects. Concurrently, we will launch a new line at our Niigata factory and commence mass production at our Singapore factory. At the top is the advanced semiconductor packaging. We shall continue to develop technologies such as glass cores, glass interposers, and organic RDL interposers alongside the chiplet structure incorporating a silicon interposer on FC-BGA to create high-value-add products. The current plan is to do development at the Advanced Semiconductor Packaging Development Center and mass production at the Ishikawa Plant. We shall contribute to the supply of semiconductor packages utilizing new technologies to address the societal challenges of increased data traffic and low power consumption demanded by network switches and AI.
From this point on, let me explain the background to our technology roadmap, specifically focusing on the performance required of semiconductor packages in 2030 and the associated challenges. First, next-generation AI network transmission performance projection. Currently, Gen AI is not becoming commonplace, but going forward, we will see an increase in next-generation use cases requiring real-time capabilities and high information density, such as autonomous driving and telemedicine. Our estimates indicate that by 2030, data centers will require transmission speeds 32x faster than in 2020, reaching 800 Tbps, demanding ultra-high speed and low-latency performance. Let me introduce the technological trends enabling transmission speed of 800 Tbps. First, miniaturization of interconnects. As the performance of AI semiconductors improves, the miniaturization of interconnects becomes an extremely critical issue for achieving heterogeneous chip integration and the chiplet structures that enable it.
Performance-wise, maximizing interconnect density and securing high bandwidth are essential to complement Moore's law and address the narrowing pitch of I/Os. Regarding power efficiency, minimizing parasitic capacitance and reducing die-to-die resistance and capacitance characteristics are required. Simultaneously, this contributes to reducing the physical size of the system, supporting miniaturization and form factor reduction. Thus, from the perspectives of performance, power consumption, and area, value enhancement through interconnect miniaturization is anticipated, with requirements for both line, width, and spacing to fall below one micron by 2030. The next challenge is semiconductor packaging structure required in 2030. Conventionally, as shown on the left, the predominant approach involved packing all necessary functions onto a single chip. However, the performance gains achieved through chip miniaturization and scaling up are now facing barriers related to fabrication complexity and cost increases. The breakthrough for this challenge lies in the chiplet structure shown on the right.
This technology involves dividing and manufacturing separately by function, the chips and memory, and reintegrating them in high density on a large interposer and a large FC-BGA substrate. As you see, achieving large-scale integration and co-packing of optical elements, which was impossible with single chips, requires support from the scaling of packaging components such as interposers and FC-BGA substrates. Specifically, the size of FC-BGA substrates is projected to exceed 200 mm by 2030. However, with the currently predominant silicon-based interposers, while excelling in miniaturization performance, die count goes down with scaling due to their circular shape, which poses scaling-up constraints from an economic efficiency perspective. Consequently, there is a growing expectation for next-generation interposer technologies that can scale and offer miniaturization performance that rivals that of silicon interposers. Another challenge is photonics-electronics convergence. I mentioned that the transmission speed required by 2030 will reach 800 Tbps.
However, attempting to achieve this speed using conventional electrical signals and transmission distances would result in transmission losses exceeding acceptable limits, rendering the system unfeasible. One configuration proposed as a solution to suppress transmission loss to levels demanded by the market is transmission using light. Please look at the right-hand side future diagram. By positioning the OE converter close to the semiconductor chips, we reduce the electrical transmission distance. Simultaneously, we need to develop a configuration that minimizes transmission loss by using low-loss optical transmission between chips, employing fiber ribbons and optical waveguides. Thus far, we have outlined the major technological trends required for advanced semiconductor packaging, miniaturization, new interposers, and photonics-electronics conversion. Let us now detail our specific initiatives and solutions to address these market demands.
Against the backdrop of advances in AI, we believe that enhancing the performance of semiconductor packaging requires changes in the specifications of interposers and FC-BGA substrates, as shown in the center of the slide. Among these, interposers are required to offer a larger body size and high flatness for mounting chiplets, as well as high-speed, large-capacity transmission and low power consumption. In response to this, we are designing and developing manufacturing technologies for glass interposers and organic interposers of submicron RDLs for large panel formats using damascene process. Regarding the requirements for FC-BGA substrates, we will address miniaturization and embedded components through further technological pursuit based on the FC-BGA manufacturing technologies we have cultivated to date. For high flatness, high rigidity, low CTE, low transmission loss, we will respond through the development of glass core as a new core material.
For high-speed transmission, we will respond primarily through support for optical transmission. Today, we will explain in detail on the following slides the three key technologies for realizing our strategy: submicron organic RDL interposers, glass cores, and support for optical transmission. Our first initiative is the design and manufacturing technology development for submicron organic RDL interposers. Toward achieving a chiplet structure for the coming era of 800 Tbps high-capacity data transmission, we aim for the world's first social implementation of a large interposer with submicron RDLs using the damascene process on a panel 500 sq mm or larger. This R&D project has been selected for NEDO's Research and Development Project of Enhanced Infrastructure for Post-5G Information and Communication Systems administered by METI. To realize this, we will proceed in two development steps. Please refer to the figure at the lower left.
In the semi-additive process commonly used in FC-BGA, if wiring is made finer down to the submicron level, there is a risk of wiring patterns collapsing during the manufacturing process. Meanwhile, in the damascene process, trenches are first formed in the insulating film, copper is embedded into those trenches, and finally, excess copper is removed through CMP polishing, eliminating the risk of wiring pattern collapse. We are using this method to design and develop process and inspection technologies for organic RDL interposers. In manufacturing validation, we have already applied the damascene process and verified the formation of fine wiring with two-micron line width and spacing on a 510 times 515 millimeter panel format, which is larger than a silicon wafer. Based on this technology, we will expand into the submicron domain and realize the next-generation interposer that achieves both large size and miniaturization.
Our second initiative is the development of glass core FC-BGA. As chiplet adoption progresses, the number of chips mounted on FC-BGA substrates increases and package sizes become larger, raising the requirements for low warpage and high rigidity for the FC-BGA core, the supporting structure. To address this, we are developing FC-BGAs that use glass, which exhibits low warpage and high rigidity as the core material in place of conventional resin cores. Our strength lies in our ability to apply the large glass handling technology cultivated over many years in the display business. We have already established the process for stable formation of cavities for embedded components, which had been a challenge, and have also found solutions for suppressing severe cracks by optimizing manufacturing and processing methods. We are currently examining the construction of a production line while promoting sample evaluation with customers. Third is support for photonics-electronics convergence.
In-package structure supporting this convergence, it's extremely important to not only achieve low-loss optical transmission, but to minimize losses in the remaining electrical transmission section connecting chips to OE converter. We are working with partner companies to develop technologies for forming optical waveguides within FC-BGA substrates and interposers and establish technological superiority. At the same time, as an FC-BGA supplier with strengthened electrical signal quality, we are pursuing high-speed transmission technology that minimizes loss in the remaining last few millimeters of electrical transmission, thereby supporting networks in the AI era. The advanced technology development described thus far cannot be accomplished by our company alone. For the development of new technologies, in addition to our own resources such as FC-BGA mass production, LSI design, and glass handling processing as the core, we will build a strong ecosystem with domestic and international partners to accelerate and streamline R&D.
Through partnerships in consortia such as US-JOINT, we will also respond flexibly to market changes and step up collaboration with North American customers to provide them with development results and create true customer value. Finally, we will explain our site strategy for developing and mass producing the new technologies described earlier. At Niigata Plant and Singapore AST, our overseas base, we will expand production capacity by installing new lines and promote development of next-generation semiconductor packaging primarily at Ishikawa Plant. Construction of the new plant in Singapore is progressing smoothly, with the opening ceremony planned for around summer 2026 and operations scheduled to begin toward the end of 2026. Our electronics business will accurately assess the growing demand for AI and data centers by providing new solutions across the full spectrum of semiconductor packaging, leveraging trends such as miniaturization, chiplets, and photonics-electronics convergence.
These efforts will drive sustainable growth centered on our semiconductor packaging business. This concludes the explanation of the business strategy for our electronics business.