Cadence Design Systems, Inc. (CDNS)
Stock Price Chart
Key Info
| Market Cap | 30.45B |
| Revenue (ttm) | 2.52B |
| Net Income (ttm) | 1.08B |
| Shares Out | 278.93M |
| EPS (ttm) | 3.86 |
| PE Ratio | 28.28 |
| Forward PE | 39.22 |
| Dividend | n/a |
| Dividend Yield | n/a |
Stock Quote
| Trading Day | Oct 26, 2020 |
| Last Price | $109.16 |
| Previous Close | $112.05 |
| Change ($) | -2.89 |
| Change (%) | -2.58% |
| Day's Open | 110.31 |
| Day's Range | 108.11 - 112.22 |
| Day's Volume | 548,654 |
| 52-Week Range | 51.39 - 118.22 |
More Stats
| Market Cap | 30.45B |
| Enterprise Value | 29.84B |
| Earnings Date (est) | Jan 28, 2021 |
| Ex-Dividend Date | n/a |
| Shares Outstanding | 278.93M |
| Float | 274.89M |
| EPS (basic) | 3.93 |
| EPS (diluted) | 3.86 |
| FCF / Share | 3.06 |
| Dividend | n/a |
| Dividend Yield | n/a |
| Earnings Yield | 3.54% |
| FCF Yield | 2.75% |
| Payout Ratio | n/a |
| Shares Short | 2.29M |
| Short Ratio | 1.31 |
| Short % of Float | 0.83% |
| Beta | 1.10 |
| PE Ratio | 28.28 |
| Forward PE | 39.22 |
| P/FCF Ratio | 36.34 |
| PS Ratio | 12.07 |
| PB Ratio | 12.73 |
| Revenue | 2.52B |
| Operating Income | 569.47M |
| Net Income | 1.08B |
| Free Cash Flow | 837.87M |
| Net Cash | 609.98M |
| Net Cash / Share | 2.19 |
| Gross Margin | 82.06% |
| Operating Margin | 22.58% |
| Profit Margin | 42.70% |
| FCF Margin | 33.22% |
| ROA | 10.66% |
| ROE | 55.55% |
| ROIC | 40.20% |
Analyst Summary
Analyst Consensus: Overweight
Financial Performance
Financial Overview
| Year | 2019 | 2018 | 2017 | 2016 | 2015 | 2014 | 2013 | 2012 | 2011 | 2010 |
|---|---|---|---|---|---|---|---|---|---|---|
| Revenue | 2,336 | 2,138 | 1,943 | 1,816 | 1,702 | 1,581 | 1,460 | 1,326 | 1,150 | 936 |
| Revenue Growth | 9.27% | 10.04% | 6.99% | 6.7% | 7.66% | 8.27% | 10.08% | 15.36% | 22.85% | - |
| Gross Profit | 2,070 | 1,879 | 1,706 | 1,560 | 1,464 | 1,357 | 1,260 | 1,135 | 955 | 780 |
| Operating Income | 492 | 396 | 324 | 245 | 285 | 207 | 189 | 212 | 120 | -28.97 |
| Net Income | 989 | 346 | 204 | 203 | 252 | 159 | 164 | 440 | 72.23 | 127 |
| Shares Outstanding | 273 | 274 | 272 | 285 | 288 | 283 | 278 | 270 | 264 | 261 |
| Earnings Per Share | 3.53 | 1.23 | 0.73 | 0.70 | 0.81 | 0.52 | 0.56 | 1.57 | 0.27 | 0.48 |
| EPS Growth | 186.99% | 68.49% | 4.29% | -13.58% | 55.77% | -7.14% | -64.33% | 481.48% | -43.75% | - |
| Operating Cash Flow | 730 | 605 | 471 | 445 | 378 | 317 | 368 | 316 | 240 | 199 |
| Capital Expenditures | -74.61 | -61.50 | -57.90 | -52.79 | -44.81 | -39.81 | -44.93 | -35.97 | -31.42 | -33.88 |
| Free Cash Flow | 655 | 543 | 413 | 392 | 333 | 277 | 323 | 280 | 209 | 165 |
| Cash & Equivalents | 705 | 533 | 688 | 468 | 711 | 1,023 | 633 | 827 | 605 | 570 |
| Total Debt | 346 | 445 | 729 | 693 | 343 | 691 | 325 | 447 | 426 | 550 |
| Net Cash / Debt | 359 | 88.01 | -41.28 | -225 | 368 | 331 | 308 | 380 | 179 | 20.46 |
| Assets | 3,357 | 2,469 | 2,419 | 2,097 | 2,346 | 3,210 | 2,429 | 2,287 | 1,761 | 1,732 |
| Liabilities | 1,254 | 1,180 | 1,430 | 1,355 | 969 | 1,876 | 1,272 | 1,372 | 1,350 | 1,455 |
| Book Value | 2,103 | 1,288 | 989 | 742 | 1,376 | 1,334 | 1,156 | 915 | 411 | 277 |
Company Profile
Company Details
| Full Name | Cadence Design Systems, Inc. |
| Country | United States |
| Employees | 8,100 |
| CEO | Lip Bu Tan |
Stock Information
| Ticker Symbol | CDNS |
| Stock Exchange | NASDAQ |
| Sector | Technology |
| Industry | Software—Application |
| Unique Identifier | NASDAQ: CDNS |
| IPO Date | June 10, 1987 |
Description
Cadence Design Systems provides software, hardware, services, and reusable integrated circuit (IC) design blocks worldwide. The company offers functional verification services, including emulation and prototyping hardware. Its functional verification offering consists of JasperGold, a formal verification platform; Xcelium, a parallel logic simulation platform; Palladium, an emulation platform; and Protium, a prototyping platform for chip verification. The company also provides digital IC design products; physical implementation tools, including place and route, optimization, and multiple patterning preparation; and signoff products to signoff the design as ready for manufacture by a silicon foundry. In addition, it offers custom IC design and simulation products to create schematic and physical representations of circuits down to the transistor level for analog, mixed-signal, custom digital, memory, and radio frequency designs; and system interconnect design products to develop printed circuit boards and IC packages, as well as to analyze electromagnetic, electro-thermal, and other multi-physics effects. Further, the company provides intellectual property (IP) products consisting of pre-verified and customizable functional blocks to integrate into customer's ICs; and verification IP and memory models for use in system-level verification to model correct behavior of full systems interacting with their environments. Additionally, it offers services related to methodology, education, and hosted design solutions, as well as technical support and maintenance services. Cadence Design Systems, Inc. was founded in 1988 and is headquartered in San Jose, California.